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This PR still uses the old layout that the conflict restructure (#144, #147, #148, #150) replaced on What to move:
This PR is stacked on another branch, so apply the same moves on that base first. See the "Keeping parallel PRs from conflicting" section of Generated by Claude Code |
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Done, on current Generated by Claude Code |
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vg_sha256_compress keeps the working variables in the low words of r7-r12, r14 and r15 (saving the nonvolatile r14-r19 in its scratch space), loads the message big-endian with lwbrx, and builds the round constants with lis/ori. init/update/finalize follow the AArch64 implementation: their variables live in r26-r31 (saved in scratch), they call vg_sha256_compress, and the link register is moved to r0 and saved in an ELFv2 frame around the whole function. The digest and the message length are stored big-endian with stwbrx/stdbrx. The update and finalize proofs track r14-r19, which only the compression function writes, through its ABI guarantee. As on the other targets, the proofs use 112 and 160 bytes of scratch, and Shared.lean widens them to the shared contracts' 560 and 608 (Verified.widen, which now allows frames). The SHA-256 API and its CAVP tests now build on little-endian powerpc64; they pass under qemu-ppc64le. The SHA-1 and SHA-512 CAVP tests, which share the test binary, are gated to the architectures those hashes support. Refs #55 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01Fw6RULWHCeVgMDGc3wRrwE
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Part of #55. Stacked on #109 (ChaCha20, which now carries the whole PPC64LE proof framework, calls and frames included), #108 (TCB) and #97 (CI). There are no TCB or spec changes. This PR adds implementations proven against the existing
Spec.Sha256contracts.SHA-256 on PPC64LE
vg_sha256_compress:r7–r12,r14andr15; the fully unrolled rounds rename them.scratch[0..64), and the nonvolatiler14–r19are saved inscratch[64..112).lwbrx, and eachKₜis built withlis/ori.vg_sha256_init/update/finalizefollow the AArch64 implementation:r26–r31, with the caller's values saved inscratch[112..160).vg_sha256_compress.r0and saved in an ELFv2 frame, soupdate/finalizeuse 48 bytes of stack (stack := 48).stwbrx/stdbrx.update/finalizeproofs trackr14–r19, which only the compression function writes, through its ABI guarantee.updateContractandfinalizeContracthold for a state hashed from any initial hash value (ReprFrom iv,finalHash iv), so SHA-224 can share them.iv, as ARMv7's and AArch64's do.Proof/Sha256/Stream.lean(untrusted, target-independent) getsiv-general versions of its lemmas:reprFrom_congr,reprFrom_append_buf,reprFrom_append_block,finalHash_eq,finalHash_oneandfinalHash_two. The existingRepr/hashlemmas are now theirH0cases, so other callers are unchanged.vg_sha224_initis not implemented on PPC64LE; SHA-224 stays off it for now.compressand 608 toupdate/finalize(sized for x86-64's AVX2 code). As on AArch64, the proofs use 112/160 bytes, andShared.leanwidens them withVerified.widen. The PPC64LEVerified.widennow usesExec.rdwr, as AArch64's does, so it applies to code with frames.finalize(rev32_bytes,rev64_bytes) are now PPC64LE's own, so no PPC64LE module imports an x86-64 one (ci/check_lean_imports.py).Apiform inArtifacts/Sha256/PPC64LE.lean.Rust
src/hashes/sha256.rsnames PPC64LE in its inner#[cfg(...)], as do thehashesandtests/cavpumbrella cfgs.tests/cavp/sha1.rs,sha224.rsandsha512.rsget their own four-architecture gates, since they share the CAVP binary (ci/check_arch_gates.py).README
Regenerated by
ci/algorithms_table.py: SHA-256 is ✅ on PPC64LE.Testing
On #97's head (merged with
mainat 101fe4b), these all pass:lake buildandEmit.lean --checkci/check_lean_imports.py,check_lean_speed.py,check_vectors.py,check_arch_gates.py,check_variants.py,check_mcdt.py,algorithms_table.pycargo fmt, andcargo clippy -D warningson the host and for ppc64lecargo testcross-built forpowerpc64le-unknown-linux-gnuunderqemu-ppc64le(CAVP SHA-256 short, long and Monte Carlo)🤖 Generated with Claude Code
https://claude.ai/code/session_01Fw6RULWHCeVgMDGc3wRrwE