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This PR still uses the old layout that the conflict restructure (#144, #147, #148, #150) replaced on What to move:
This PR is stacked on another branch, so apply the same moves on that base first. See the "Keeping parallel PRs from conflicting" section of Generated by Claude Code |
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Done, on current Generated by Claude Code |
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The same algorithm as on AArch64. vg_hmac_sha256_init stores H0 in both states, XORs the key into the ipad and opad blocks, and calls vg_sha256_compress on each; vg_hmac_sha256_finalize calls vg_sha256_finalize on the inner state, rebuilds it as (K0 ^ opad) || digest from the outer hash value, and finalizes it again, leaving the MAC in scratch[176..208). Both move the link register to r0 and save it in an ELFv2 frame; init keeps its variables in r26-r31 (saved in scratch) and finalize in r24-r25, which the callees preserve. As on AArch64, the proofs use 160 and 240 bytes of scratch, and Shared.lean widens them to the shared contracts' 608 and 688. The target-independent lemmas come from Proof/Hmac/Common.lean. HMAC-SHA-256 and its Wycheproof tests now build on little-endian powerpc64 (with the MAC left in scratch, as on the other 64-bit targets); they pass under qemu-ppc64le. The other HMACs, and PBKDF2 (the only user of sha256_key_states), stay on the other architectures. Refs #55 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01Fw6RULWHCeVgMDGc3wRrwE
HMAC's verify compares MACs with vg_ct_eq (crate::ct), which needs an implementation on every architecture that uses it: a verified PPC64LE one, the same algorithm as AArch64's. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01Fw6RULWHCeVgMDGc3wRrwE
…/finalize vg_sha512_compress has the structure of the SHA-256 implementation on whole 64-bit registers: the working variables in r7-r12, r14 and r15 (saving the nonvolatile r14-r19 in scratch[128..176)), the message loaded big-endian with ldbrx, and each 64-bit constant built with lis, ori, sldi, oris and ori. As on AArch64, init/update/finalize inline the compression function rather than call it, so they change neither the link register nor the stack and need no frame. Their variables live in r26-r31 (saved in scratch[176..224)); the proofs track r14-r19, which only the inlined compression function writes, through its ABI guarantee. The digest and the 128-bit message length are stored big-endian with stdbrx. The SHA-512 family's API and CAVP tests now build on little-endian powerpc64; they pass under qemu-ppc64le. Its benchmark and CAVP tests lose their four-architecture gates. Refs #55 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01Fw6RULWHCeVgMDGc3wRrwE
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Part of #55. Stacked on #110 (SHA-256, whose stream lemmas it reuses), and so on #109, #108 and #97. It is independent of the HMAC PR (#111). There are no TCB or spec changes. This PR adds implementations proven against the existing
Spec.Sha512contracts.What
vg_sha512_compress(state = r3, blocks = r4, n = r5, scratch = r6)has the structure of the PPC64LE SHA-256 implementation, on whole 64-bit registers:r7–r12,r14andr15, renamed by the unrolled rounds.scratch[0..128), and the nonvolatiler14–r19are saved inscratch[128..176).ldbrx.Kₜis built withlis,ori,sldi,oris,ori(movImm64, proven equal to the constant once,movImm64_eq).vg_sha384_init/vg_sha512_init/vg_sha512_224_init/vg_sha512_256_init,vg_sha512_updateandvg_sha512_finalize:stack = 0).r26–r31, with the caller's values saved inscratch[176..224).r14–r19, which only the inlined compression function writes, through itsVerifiedABI guarantee (WP.inline).stdbrx.The proofs are in
Proof/Sha512/PPC64LE/. The code uses 176 bytes of scratch forcompressand 224 forupdate/finalize.Shared.leanwidens these to the shared contracts' current 1328/1376 bytes (sized onmainfor x86-64's AVX2 compression function), as AArch64 does, and moves them to the shared contracts. The seven artifacts are registered inApiform inArtifacts/Sha512/PPC64LE.lean.Rust
src/hashes/sha512.rsnames PPC64LE in its inner#[cfg(...)]. PPC64LE uses only the scalar backend.tests/cavp/sha512.rsand the SHA-512 benchmark lose the four-architecture gates that SHA-256 on PPC64LE: verified compress/init/update/finalize #110 and CI: test on ppc64le, on a ppc64le runner as pyca/cryptography does #97 gave them.README
Regenerated by
ci/algorithms_table.py: the SHA-384/512 row is ✅ on PPC64LE.Testing
On current
main(with #97), these all pass:lake buildandEmit.lean --checkci/check_lean_imports.py,check_lean_speed.py,check_vectors.py,check_arch_gates.py,check_variants.py,algorithms_table.py --checkcargo fmt, andcargo clippy -D warningson the host and for ppc64lecargo teston x86-64, and cross-built forpowerpc64le-unknown-linux-gnuunderqemu-ppc64le(CAVP short, long and Monte Carlo for all four of SHA-384, SHA-512, SHA-512/224 and SHA-512/256)🤖 Generated with Claude Code
https://claude.ai/code/session_01Fw6RULWHCeVgMDGc3wRrwE