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feat: 支持算子级显存 dry-run 分析 - #102

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DavidFFFan wants to merge 3 commits into
mindspore-ai:masterfrom
DavidFFFan:sync/pr-1059

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@DavidFFFan

@DavidFFFan DavidFFFan commented Sep 11, 2026 •

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Paired: GitHub #102 ↔ GitCode !1774

What type of PR is this?

/kind feature

What does this PR do / why do we need it?

在 Torch-only master 上提供模型无关的 FakeTensor dry-run 逻辑显存仿真。

  • 全部实现位于 hyper_parallel/tools/dryrun/,正常训练入口和业务模型不依赖 dry-run 配置。
  • 入口为 python -m hyper_parallel.tools.dryrun config.yaml;支持单进程顺序仿真多个 rank,也支持 torchrun 按 dry_run.ranks 过滤 worker。
  • dry_run 配置包含开关、目标设备、rank 列表、虚拟拓扑和 snapshot 子配置。
  • snapshot.path 是输出根目录,自动生成 rank_<rank>/memory.pickle;不设置 output_dir 路径别名。
  • MoE 强制均衡只解决 expert 选择;FakeTensor 仍无法提供 argsort permutation、host counts 和 value-sized slicing。已注册 handler 自动发现目标并默认 replay balanced 路径,不再要求用户配置 value_dependencies。
  • 自定义算子通过 register_fake_op 即时注册,定义模块被 import 后立即生效,没有 op_plugins 开关。
  • 兼容层集中管理 DTensor、FSDP、AutoModel、optimizer 和 CSA2 的 FakeTensor 差异;Muon storage alias 直接比较 untyped_storage() identity,不使用 FakeTensor 下无效的 data_ptr()。

Interface

dry_run:
  enabled: true
  target_device: npu
  ranks: [0, 7]
  virtual_world_size: 8
  snapshot:
    enabled: true
    path: outputs/dryrun/deepseek_v41
    capture_stacks: true
    stack_depth: 64

设计原理

  • 复用正常模型构建、并行切分、首个 CPU batch、forward/backward 和 optimizer step。
  • FakeTensor 只保留 shape/dtype/layout,不加载权重或执行设备计算。
  • LogicalMemoryTracker 按 storage identity 追踪 allocation、alias、resize 和 release。
  • 输出保持 PyTorch MemoryViz 兼容的 segments 和 device_traces,metadata 内嵌在 pickle 中。
  • workspace、allocator 碎片、异步 stream 和通信库常驻内存不仿真。

完整设计已同步到 issue #610,并在 hyper_parallel/tools/dryrun/DESIGN.md 中维护。

Validation

  • 定向回归:191 passed。
  • 覆盖 DeepSeek V4.1、dryrun、DTensor、Muon 和配置解析。
  • git diff --check、Python 编译检查和 AGENTS catalog 检查通过。

Closes #610

atomgit_repo: mindspore/hyper-parallel
atomgit_mr: 1059
source_branch: hyper-parallel-dry-run
source_url: https://gitcode.com/mindspore/hyper-parallel/merge_requests/1059

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CLAassistant commented Sep 11, 2026 •

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@mxysfive

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或植入 DeepSeek 特判 --PR描述这个去掉。可以让AI在PR描述里补充一下Dryrun的用法。

@DavidFFFan
DavidFFFan force-pushed the sync/pr-1059 branch 3 times, most recently from 2266a97 to 11216f1 Compare October 19, 2026 07:29
@mindspore-ai-bot mindspore-ai-bot mentioned this pull request Nov 10, 2026
3 of 5 tasks
@DavidFFFan
DavidFFFan force-pushed the sync/pr-1059 branch 6 times, most recently from 9c5ff91 to d9fce7d Compare November 12, 2026 06:48
@DavidFFFan

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/check-pr

Drive the unmodified TextTrainer.train_step over FakeTensors: the tool
owns only the environment (fake process group, FakeTensor materialization,
host-scalar shim, simulated device runtime); step logic is the trainer's
own code. DTensor supports FakeTensor locals natively via a meta-shell
variant. Validated on 8x Ascend 910B across EP/FSDP/TP+SP/CP at 94-100%
of the real trace peak; tests/torch/tools reconciles dry-run snapshots
against real allocator traces per call site.
Offload/swap storage lifecycles are host-ordered (resize_(0) on
wait_offload, resize_ + copy on load), so dry-run now accepts
fsdp_config.enable_offload, optimizer.swap and activation_swap:
stream/event primitives resolve through a simulation seam
(core/utils/simulation.py), pinning degrades to plain host memory,
and the snapshot gains a host ledger (summary.host_peak_bytes).

Real-path fixes surfaced by the 8-die reconciliation: Muon metadata
gather and fused all-gather staged on the shard group's backend
device instead of CPU params, grad-norm scalars staged likewise, and
swap identity keys moved from data_ptr() (0 for empty/fake storages)
to storage object identity. FakeTensor dispatch cache is disabled
during simulation: its keys pin released storages and inflated the
activation-swap peak by 25%.

Validated on 8x910B3: FSDP offload 100.0%, activation swap 101.5%,
optimizer swap 101.1% of real trace peak; reconciliation ST extended
with offload and swap scenarios (passed, 12m39s).
…r ST

- CSA2 patches move to the DeepSeek example via register_environment_patch;
  generic compatibility no longer imports model-specific code
- record_stream stand-in holds staging refs until the next simulated wait,
  keeping logical staging lifetimes conservative
- reconciliation ST: peak band tightened to [0.90, 1.05], baseline scenario
  added, offload/swap device-host trade asserted via check_offload_trade
- CPU-fallback single-ledger behavior documented as accepted limit
- process-lifetime contract documented; 120-col fix in runner
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[Feature]: 分布式训练 Dry-run 内存模拟

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