UCIe digital bump

software/Makefile

@@ -33,10 +33,10 @@ ARCHFLAGS = -march=$(ARCH) -mabi=$(ABI)
 # vector extension. Kept separate so it doesn't force V onto every program.
 VEC_ARCHFLAGS = -march=rv64gcv_zfh_zvfh -mabi=$(ABI)
 
-CFLAGS  = -std=gnu99 -O2 -fno-common -fno-builtin-printf -Wall -specs=htif_nano.specs
+CFLAGS  = -std=gnu99 -O2 -fno-common -fno-builtin-printf -Wall -specs=htif_nano.specs -Iinclude
 LDFLAGS = -specs=htif_nano.specs
 
-PROGRAMS = hello hello0 hello1 router ring-hello ucie-loopback tacit-always tacit-dma ucie-vec-memcpy
+PROGRAMS = hello hello0 hello1 router ring-hello ucie-loopback ucie-digital-loopback tacit-always tacit-dma ucie-vec-memcpy
 
 .DEFAULT_GOAL := default
 

software/ucie-digital-loopback.c

@@ -0,0 +1,76 @@
+#include <stdio.h>
+#include <string.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <riscv-pk/encoding.h>
+#include "marchid.h"
+#include "mmio.h"
+#include "router.h"
+#include "ucie.h"
+
+#define UCIE0_REG_BASE 0x200000UL
+#define UCIE1_REG_BASE 0x208000UL
+#define ROUTER_MMIO 0x4000
+#define CHIP_ID_ADDR 0x4080
+#define OFFCHIP_OFFSET 0x800000000L
+
+uint32_t src[10] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};
+uint32_t dest[10];
+uint32_t test[10];
+
+int rw_mem(uint64_t offset) {
+  // remote = dest on the other chip: same local address as our dest, tagged with target chip ID.
+  // offset = OFFCHIP_OFFSET * target_chipId (a byte offset, added via uint8_t* cast).
+  void *remote = (void *)((uint8_t *)dest + offset);
+
+  size_t write_start = rdcycle();
+  memcpy(remote, src, sizeof(src));
+  size_t write_end = rdcycle();
+
+  printf("Wrote %ld bytes in %ld cycles\n", sizeof(src), write_end - write_start);
+
+  size_t read_start = rdcycle();
+  memcpy(test, remote, sizeof(src));
+  size_t read_end = rdcycle();
+
+  for (int i = 0; i < 10; i++) {
+      if (src[i] != test[i]) {
+        printf("Remote write/read failed at index %d: wrote %x, read %x\n", i, src[i], test[i]);
+        exit(1);
+      }
+  }
+
+  printf("Read %ld bytes in %ld cycles\n", sizeof(src), read_end - read_start);
+
+  return 0;
+}
+
+int main(void) {
+
+  int chip_id = reg_read64(CHIP_ID_ADDR);
+
+  printf("Got chip ID: %d\n", chip_id);
+
+  // setup_ucie_digital() brings up the PHY, hands both bands to the real
+  // UCIe digital controller (controllerSel = ucie), and blocks until spec
+  // link training completes. Unlike ucie-loopback.c's setup_ucie() +
+  // UCIE_BAND_MODE_TL, which bypasses UcieDigitalTop and frames TileLink
+  // directly onto the mainband, requests here are carried by the trained
+  // link through the real protocol layer/D2D adapter/logical PHY stack.
+  printf("Setting up UCIe0 (digital controller)\n");
+  setup_ucie_digital(UCIE0_REG_BASE);
+  printf("Setting up UCIe1 (digital controller)\n");
+  setup_ucie_digital(UCIE1_REG_BASE);
+
+  printf("Testing UCIe at port 0\n");
+  program_router(0, 1, 0);
+  rw_mem(OFFCHIP_OFFSET);
+
+  printf("Testing UCIe at port 1\n");
+  program_router(0, 1, 1);
+  rw_mem(OFFCHIP_OFFSET);
+
+  printf("UCIe digital loopback test complete\n");
+
+  return 0;
+}