Issues

• Cospike creates Spike with trigger_count = 0, so any Rocket breakpoint (nBreakpoints = 1) mismatches

  ucb-bar/testchipip#279 · Filter by author youzi27 opened on Sep 27, 2026

• Incorrect CSR State Override Logic Causes Spike State Rollback on RMW Instructions

  ucb-bar/testchipip#268 · Filter by author hjw-arch opened on Jan 9, 2026

• bootrom string doesn't allow to set file

  ucb-bar/testchipip#261 · Filter by author omerguzelelectronicguy opened on Oct 15, 2025

• Mismatch in CoSpike co-simulation about WLRL CSR registers

  ucb-bar/testchipip#258 · Filter by author ZhongYic00 opened on Apr 30, 2025

• Remove dependency on sifive-blocks

  ucb-bar/testchipip#156 · Filter by author jerryz123 opened on Jan 18, 2023
  1

• It cannot compatible 128 bit data length

  ucb-bar/testchipip#147 · Filter by author matchchen opened on Jul 11, 2022
  2

• Make BlockDevice base address come from Config

  ucb-bar/testchipip#131 · Filter by author timsnyder-siv opened on Apr 16, 2021
  1

• Make SimDRAM work when physical address width > 32 bits.

  bug
  ucb-bar/testchipip#127 · Filter by author jerryz123 opened on Mar 29, 2021

• TSI Host Widget Full Integration Test

  enhancementhelp wanted
  ucb-bar/testchipip#117 · Filter by author abejgonzalez opened on Jan 8, 2021

• TSI Host Widget Documentation

  enhancementhelp wanted
  ucb-bar/testchipip#116 · Filter by author abejgonzalez opened on Jan 8, 2021

• value += is not a member of String

  ucb-bar/testchipip#95 · Filter by author apaj opened on Jul 23, 2020

• SerialAdapter should require minLatency > 0

  ucb-bar/testchipip#88 · Filter by author mwachs5 opened on Jun 13, 2020
  2

• Use PlusArgArtefacts.append to avoid emulator.cc hacks in next RC bump

  ucb-bar/testchipip#86 · Filter by author jwright6323 opened on May 21, 2020

• Eventually move to the InModuleBody paradigm instead of ModuleImps to mirror rocket-chip

  ucb-bar/testchipip#77 · Filter by author jwright6323 opened on Apr 16, 2020

• Import issue: compile fails, can't find UARTPortIO

  ucb-bar/testchipip#72 · Filter by author bradley-evans opened on Mar 24, 2020

• Provide parameterization of SERIAL_IF_WIDTH

  ucb-bar/testchipip#63 · Filter by author jerryz123 opened on Jan 18, 2020

• Bidirectional serdes safe usage

  ucb-bar/testchipip#49 · Filter by author colinschmidt opened on Jul 12, 2019
  2

• ClockUtil unit tests

  ucb-bar/testchipip#40 · Filter by author jwright6323 opened on Mar 28, 2019

• Making Host/Target coordination for the TLSerdesser easier

  enhancement
  ucb-bar/testchipip#37 · Filter by author jwright6323 opened on Mar 5, 2019
  2