Add C++ RC Extraction project for physical-design signoff - #4
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sethupathib wants to merge 3 commits into
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Add C++ RC Extraction project for physical-design signoff#4sethupathib wants to merge 3 commits into
sethupathib wants to merge 3 commits into
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Implements a from-scratch interconnect parasitic extractor: layout geometry → connectivity → R/C → π-model SPEF → Elmore delay. Includes theory docs, three example layouts, unit tests, and Makefile/CMake builds. Co-authored-by: Sethupathi Balakrishnan <b.sethupathi@gmail.com>
Stop tracking object files and binaries; keep sources only. Co-authored-by: Sethupathi Balakrishnan <b.sethupathi@gmail.com>
Detailed educational white paper covering GDS→connectivity→R/C→SPEF→STA, companion C++ teaching extractor, formula sheet, and repository map. Co-authored-by: Sethupathi Balakrishnan <b.sethupathi@gmail.com>
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Summary
Adds a strictly C++17 teaching project that shows how interconnect R & C are extracted from layout geometry (GDS-like shapes) for physical-design signoff — not from a logical netlist.
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Contents
RC Extraction/— headers, sources, Makefile + CMake, unit testsdocs/THEORY.md— GDS → LVS vs parasitic extraction, formulas, SPEF, cornersdocs/RC_Extraction_Signoff_Whitepaper.pdf— detailed educational white paper (also.mdsource)simple_net,coupled_nets,via_stackVerify