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loongarch: Use intrinsics::simd for vbit{clr,rev,set} #2093

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Merged
folkertdev merged 1 commit into from
May 7, 2026
Merged

loongarch: Use intrinsics::simd for vbit{clr,rev,set} #2093

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108 changes: 0 additions & 108 deletions crates/core_arch/src/loongarch64/lasx/generated.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -43,14 +43,6 @@ unsafe extern "unadjusted" {
fn __lasx_xvsrlri_w(a: __v8i32, b: u32) -> __v8i32;
#[link_name = "llvm.loongarch.lasx.xvsrlri.d"]
fn __lasx_xvsrlri_d(a: __v4i64, b: u32) -> __v4i64;
#[link_name = "llvm.loongarch.lasx.xvbitclr.b"]
fn __lasx_xvbitclr_b(a: __v32u8, b: __v32u8) -> __v32u8;
#[link_name = "llvm.loongarch.lasx.xvbitclr.h"]
fn __lasx_xvbitclr_h(a: __v16u16, b: __v16u16) -> __v16u16;
#[link_name = "llvm.loongarch.lasx.xvbitclr.w"]
fn __lasx_xvbitclr_w(a: __v8u32, b: __v8u32) -> __v8u32;
#[link_name = "llvm.loongarch.lasx.xvbitclr.d"]
fn __lasx_xvbitclr_d(a: __v4u64, b: __v4u64) -> __v4u64;
#[link_name = "llvm.loongarch.lasx.xvbitclri.b"]
fn __lasx_xvbitclri_b(a: __v32u8, b: u32) -> __v32u8;
#[link_name = "llvm.loongarch.lasx.xvbitclri.h"]
Expand All @@ -59,14 +51,6 @@ unsafe extern "unadjusted" {
fn __lasx_xvbitclri_w(a: __v8u32, b: u32) -> __v8u32;
#[link_name = "llvm.loongarch.lasx.xvbitclri.d"]
fn __lasx_xvbitclri_d(a: __v4u64, b: u32) -> __v4u64;
#[link_name = "llvm.loongarch.lasx.xvbitset.b"]
fn __lasx_xvbitset_b(a: __v32u8, b: __v32u8) -> __v32u8;
#[link_name = "llvm.loongarch.lasx.xvbitset.h"]
fn __lasx_xvbitset_h(a: __v16u16, b: __v16u16) -> __v16u16;
#[link_name = "llvm.loongarch.lasx.xvbitset.w"]
fn __lasx_xvbitset_w(a: __v8u32, b: __v8u32) -> __v8u32;
#[link_name = "llvm.loongarch.lasx.xvbitset.d"]
fn __lasx_xvbitset_d(a: __v4u64, b: __v4u64) -> __v4u64;
#[link_name = "llvm.loongarch.lasx.xvbitseti.b"]
fn __lasx_xvbitseti_b(a: __v32u8, b: u32) -> __v32u8;
#[link_name = "llvm.loongarch.lasx.xvbitseti.h"]
Expand All @@ -75,14 +59,6 @@ unsafe extern "unadjusted" {
fn __lasx_xvbitseti_w(a: __v8u32, b: u32) -> __v8u32;
#[link_name = "llvm.loongarch.lasx.xvbitseti.d"]
fn __lasx_xvbitseti_d(a: __v4u64, b: u32) -> __v4u64;
#[link_name = "llvm.loongarch.lasx.xvbitrev.b"]
fn __lasx_xvbitrev_b(a: __v32u8, b: __v32u8) -> __v32u8;
#[link_name = "llvm.loongarch.lasx.xvbitrev.h"]
fn __lasx_xvbitrev_h(a: __v16u16, b: __v16u16) -> __v16u16;
#[link_name = "llvm.loongarch.lasx.xvbitrev.w"]
fn __lasx_xvbitrev_w(a: __v8u32, b: __v8u32) -> __v8u32;
#[link_name = "llvm.loongarch.lasx.xvbitrev.d"]
fn __lasx_xvbitrev_d(a: __v4u64, b: __v4u64) -> __v4u64;
#[link_name = "llvm.loongarch.lasx.xvbitrevi.b"]
fn __lasx_xvbitrevi_b(a: __v32u8, b: u32) -> __v32u8;
#[link_name = "llvm.loongarch.lasx.xvbitrevi.h"]
Expand Down Expand Up @@ -1285,34 +1261,6 @@ pub fn lasx_xvsrlri_d<const IMM6: u32>(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvsrlri_d(transmute(a), IMM6)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitclr_b(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitclr_b(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitclr_h(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitclr_h(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitclr_w(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitclr_w(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitclr_d(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitclr_d(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
Expand Down Expand Up @@ -1349,34 +1297,6 @@ pub fn lasx_xvbitclri_d<const IMM6: u32>(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitclri_d(transmute(a), IMM6)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitset_b(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitset_b(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitset_h(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitset_h(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitset_w(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitset_w(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitset_d(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitset_d(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
Expand Down Expand Up @@ -1413,34 +1333,6 @@ pub fn lasx_xvbitseti_d<const IMM6: u32>(a: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitseti_d(transmute(a), IMM6)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitrev_b(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitrev_b(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitrev_h(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitrev_h(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitrev_w(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitrev_w(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbitrev_d(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvbitrev_d(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
Expand Down
12 changes: 12 additions & 0 deletions crates/core_arch/src/loongarch64/lasx/portable.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -120,6 +120,18 @@ impl_vvv!("lasx", lasx_xvsrl_b, ls::simd_shr, m256i, u8x32);
impl_vvv!("lasx", lasx_xvsrl_h, ls::simd_shr, m256i, u16x16);
impl_vvv!("lasx", lasx_xvsrl_w, ls::simd_shr, m256i, u32x8);
impl_vvv!("lasx", lasx_xvsrl_d, ls::simd_shr, m256i, u64x4);
impl_vvv!("lasx", lasx_xvbitclr_b, ls::simd_bitclr, m256i, u8x32);
impl_vvv!("lasx", lasx_xvbitclr_h, ls::simd_bitclr, m256i, u16x16);
impl_vvv!("lasx", lasx_xvbitclr_w, ls::simd_bitclr, m256i, u32x8);
impl_vvv!("lasx", lasx_xvbitclr_d, ls::simd_bitclr, m256i, u64x4);
impl_vvv!("lasx", lasx_xvbitset_b, ls::simd_bitset, m256i, u8x32);
impl_vvv!("lasx", lasx_xvbitset_h, ls::simd_bitset, m256i, u16x16);
impl_vvv!("lasx", lasx_xvbitset_w, ls::simd_bitset, m256i, u32x8);
impl_vvv!("lasx", lasx_xvbitset_d, ls::simd_bitset, m256i, u64x4);
impl_vvv!("lasx", lasx_xvbitrev_b, ls::simd_bitrev, m256i, u8x32);
impl_vvv!("lasx", lasx_xvbitrev_h, ls::simd_bitrev, m256i, u16x16);
impl_vvv!("lasx", lasx_xvbitrev_w, ls::simd_bitrev, m256i, u32x8);
impl_vvv!("lasx", lasx_xvbitrev_d, ls::simd_bitrev, m256i, u64x4);

impl_vuv!("lasx", lasx_xvslli_b, is::simd_shl, m256i, i8x32);
impl_vuv!("lasx", lasx_xvslli_h, is::simd_shl, m256i, i16x16);
Expand Down
108 changes: 0 additions & 108 deletions crates/core_arch/src/loongarch64/lsx/generated.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -43,14 +43,6 @@ unsafe extern "unadjusted" {
fn __lsx_vsrlri_w(a: __v4i32, b: u32) -> __v4i32;
#[link_name = "llvm.loongarch.lsx.vsrlri.d"]
fn __lsx_vsrlri_d(a: __v2i64, b: u32) -> __v2i64;
#[link_name = "llvm.loongarch.lsx.vbitclr.b"]
fn __lsx_vbitclr_b(a: __v16u8, b: __v16u8) -> __v16u8;
#[link_name = "llvm.loongarch.lsx.vbitclr.h"]
fn __lsx_vbitclr_h(a: __v8u16, b: __v8u16) -> __v8u16;
#[link_name = "llvm.loongarch.lsx.vbitclr.w"]
fn __lsx_vbitclr_w(a: __v4u32, b: __v4u32) -> __v4u32;
#[link_name = "llvm.loongarch.lsx.vbitclr.d"]
fn __lsx_vbitclr_d(a: __v2u64, b: __v2u64) -> __v2u64;
#[link_name = "llvm.loongarch.lsx.vbitclri.b"]
fn __lsx_vbitclri_b(a: __v16u8, b: u32) -> __v16u8;
#[link_name = "llvm.loongarch.lsx.vbitclri.h"]
Expand All @@ -59,14 +51,6 @@ unsafe extern "unadjusted" {
fn __lsx_vbitclri_w(a: __v4u32, b: u32) -> __v4u32;
#[link_name = "llvm.loongarch.lsx.vbitclri.d"]
fn __lsx_vbitclri_d(a: __v2u64, b: u32) -> __v2u64;
#[link_name = "llvm.loongarch.lsx.vbitset.b"]
fn __lsx_vbitset_b(a: __v16u8, b: __v16u8) -> __v16u8;
#[link_name = "llvm.loongarch.lsx.vbitset.h"]
fn __lsx_vbitset_h(a: __v8u16, b: __v8u16) -> __v8u16;
#[link_name = "llvm.loongarch.lsx.vbitset.w"]
fn __lsx_vbitset_w(a: __v4u32, b: __v4u32) -> __v4u32;
#[link_name = "llvm.loongarch.lsx.vbitset.d"]
fn __lsx_vbitset_d(a: __v2u64, b: __v2u64) -> __v2u64;
#[link_name = "llvm.loongarch.lsx.vbitseti.b"]
fn __lsx_vbitseti_b(a: __v16u8, b: u32) -> __v16u8;
#[link_name = "llvm.loongarch.lsx.vbitseti.h"]
Expand All @@ -75,14 +59,6 @@ unsafe extern "unadjusted" {
fn __lsx_vbitseti_w(a: __v4u32, b: u32) -> __v4u32;
#[link_name = "llvm.loongarch.lsx.vbitseti.d"]
fn __lsx_vbitseti_d(a: __v2u64, b: u32) -> __v2u64;
#[link_name = "llvm.loongarch.lsx.vbitrev.b"]
fn __lsx_vbitrev_b(a: __v16u8, b: __v16u8) -> __v16u8;
#[link_name = "llvm.loongarch.lsx.vbitrev.h"]
fn __lsx_vbitrev_h(a: __v8u16, b: __v8u16) -> __v8u16;
#[link_name = "llvm.loongarch.lsx.vbitrev.w"]
fn __lsx_vbitrev_w(a: __v4u32, b: __v4u32) -> __v4u32;
#[link_name = "llvm.loongarch.lsx.vbitrev.d"]
fn __lsx_vbitrev_d(a: __v2u64, b: __v2u64) -> __v2u64;
#[link_name = "llvm.loongarch.lsx.vbitrevi.b"]
fn __lsx_vbitrevi_b(a: __v16u8, b: u32) -> __v16u8;
#[link_name = "llvm.loongarch.lsx.vbitrevi.h"]
Expand Down Expand Up @@ -1197,34 +1173,6 @@ pub fn lsx_vsrlri_d<const IMM6: u32>(a: m128i) -> m128i {
unsafe { transmute(__lsx_vsrlri_d(transmute(a), IMM6)) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitclr_b(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitclr_b(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitclr_h(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitclr_h(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitclr_w(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitclr_w(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitclr_d(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitclr_d(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[rustc_legacy_const_generics(1)]
Expand Down Expand Up @@ -1261,34 +1209,6 @@ pub fn lsx_vbitclri_d<const IMM6: u32>(a: m128i) -> m128i {
unsafe { transmute(__lsx_vbitclri_d(transmute(a), IMM6)) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitset_b(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitset_b(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitset_h(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitset_h(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitset_w(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitset_w(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitset_d(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitset_d(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[rustc_legacy_const_generics(1)]
Expand Down Expand Up @@ -1325,34 +1245,6 @@ pub fn lsx_vbitseti_d<const IMM6: u32>(a: m128i) -> m128i {
unsafe { transmute(__lsx_vbitseti_d(transmute(a), IMM6)) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitrev_b(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitrev_b(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitrev_h(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitrev_h(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitrev_w(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitrev_w(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lsx_vbitrev_d(a: m128i, b: m128i) -> m128i {
unsafe { transmute(__lsx_vbitrev_d(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lsx")]
#[rustc_legacy_const_generics(1)]
Expand Down
12 changes: 12 additions & 0 deletions crates/core_arch/src/loongarch64/lsx/portable.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -120,6 +120,18 @@ impl_vvv!("lsx", lsx_vsrl_b, ls::simd_shr, m128i, u8x16);
impl_vvv!("lsx", lsx_vsrl_h, ls::simd_shr, m128i, u16x8);
impl_vvv!("lsx", lsx_vsrl_w, ls::simd_shr, m128i, u32x4);
impl_vvv!("lsx", lsx_vsrl_d, ls::simd_shr, m128i, u64x2);
impl_vvv!("lsx", lsx_vbitclr_b, ls::simd_bitclr, m128i, u8x16);
impl_vvv!("lsx", lsx_vbitclr_h, ls::simd_bitclr, m128i, u16x8);
impl_vvv!("lsx", lsx_vbitclr_w, ls::simd_bitclr, m128i, u32x4);
impl_vvv!("lsx", lsx_vbitclr_d, ls::simd_bitclr, m128i, u64x2);
impl_vvv!("lsx", lsx_vbitset_b, ls::simd_bitset, m128i, u8x16);
impl_vvv!("lsx", lsx_vbitset_h, ls::simd_bitset, m128i, u16x8);
impl_vvv!("lsx", lsx_vbitset_w, ls::simd_bitset, m128i, u32x4);
impl_vvv!("lsx", lsx_vbitset_d, ls::simd_bitset, m128i, u64x2);
impl_vvv!("lsx", lsx_vbitrev_b, ls::simd_bitrev, m128i, u8x16);
impl_vvv!("lsx", lsx_vbitrev_h, ls::simd_bitrev, m128i, u16x8);
impl_vvv!("lsx", lsx_vbitrev_w, ls::simd_bitrev, m128i, u32x4);
impl_vvv!("lsx", lsx_vbitrev_d, ls::simd_bitrev, m128i, u64x2);

impl_vuv!("lsx", lsx_vslli_b, is::simd_shl, m128i, i8x16);
impl_vuv!("lsx", lsx_vslli_h, is::simd_shl, m128i, i16x8);
Expand Down
18 changes: 18 additions & 0 deletions crates/core_arch/src/loongarch64/simd.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,24 @@ pub(super) const unsafe fn simd_andn<T: Copy + const SimdExt>(a: T, b: T) -> T {
is::simd_and(ls::simd_not(a), b)
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_bitclr<T: Copy + const SimdExt>(a: T, b: T) -> T {
ls::simd_andn(ls::simd_shl(ls::simd_splat(1), b), a)
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_bitrev<T: Copy + const SimdExt>(a: T, b: T) -> T {
is::simd_xor(ls::simd_shl(ls::simd_splat(1), b), a)
}
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#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_bitset<T: Copy + const SimdExt>(a: T, b: T) -> T {
is::simd_or(ls::simd_shl(ls::simd_splat(1), b), a)
}

#[inline(always)]
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
pub(super) const unsafe fn simd_fmsub<T: Copy>(a: T, b: T, c: T) -> T {
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