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[RV64_DYNAREC] Added AES and SHA opcodes #4366

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Merged
ptitSeb merged 1 commit into from
Sep 6, 2026
+420 −0
Merged

[RV64_DYNAREC] Added AES and SHA opcodes #4366

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84 changes: 84 additions & 0 deletions src/dynarec/rv64/dynarec_rv64_0f.c
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Original file line number Diff line number Diff line change
Expand Up @@ -864,6 +864,90 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
break;
}
nextop = F8;
if (u8 == 0xCB && cpuext.vector && cpuext.zvknha) {
SET_ELEMENT_WIDTH(x1, VECTOR_SEW32, 1);
GETGX_vector(v0, 1, VECTOR_SEW32);
GETEX_vector(v1, 0, 8, VECTOR_SEW32);
if (v0 == v1) {
int t = fpu_get_scratch(dyn);
VMV_V_V(t, v1);
v1 = t;
}
int vx0 = sse_get_reg_vector(dyn, ninst, x1, 0, 0, VECTOR_SEW32);
if (vx0 == v0 || vx0 == v1) {
int t = fpu_get_scratch(dyn);
VMV_V_V(t, vx0);
vx0 = t;
}
VSHA2CL_VV(v0, v1, vx0);
if (!MODREG) PUTEX_vector(v1, VECTOR_SEW32);
break;
}
if (u8 != 0xCB && cpuext.vector && cpuext.zvbb) {
SET_ELEMENT_WIDTH(x1, VECTOR_SEW32, 1);
GETGX_vector(v0, 1, VECTOR_SEW32);
GETEX_vector(v1, 0, 8, VECTOR_SEW32);
d0 = fpu_get_scratch(dyn);
d1 = fpu_get_scratch(dyn);
q1 = fpu_get_scratch(dyn);
int vz = fpu_get_scratch(dyn);
VXOR_VV(vz, vz, vz, 1);
switch (u8) {
case 0xC8:
VROR_VI(d0, v0, 2, 1);
VADD_VV(d0, d0, v1, 1);
if (v0 != v1) VOR_VV(v0, v1, v1, 1);
VSLIDEDOWN_VI(d1, d0, 3, 1);
VSLIDEUP_VI(v0, d1, 3, 1);
break;
case 0xC9:
VSLIDEDOWN_VI(d0, v1, 2, 1);
VSLIDEUP_VI(d0, vz, 2, 1);
VSLIDEUP_VI(d0, v0, 2, 1);
VXOR_VV(v0, v0, d0, 1);
break;
case 0xCA:
VSLIDEUP_VI(d0, vz, 0, 1);
VSLIDEUP_VI(d0, v1, 1, 1);
VXOR_VV(d0, d0, v0, 1);
VROR_VI(v0, d0, 31, 1);
VSLIDEDOWN_VI(d1, v0, 3, 1);
VSLIDEUP_VI(d1, vz, 1, 1);
VROR_VI(d1, d1, 31, 1);
VXOR_VV(v0, v0, d1, 1);
break;
case 0xCC:
VSLIDEDOWN_VI(d0, v0, 1, 1);
VSLIDEUP_VI(d0, v1, 3, 1);
VROR_VI(d1, d0, 7, 1);
VROR_VI(q1, d0, 18, 1);
VXOR_VV(d1, d1, q1, 1);
VSRL_VI(q1, d0, 3, 1);
VXOR_VV(d1, d1, q1, 1);
VADD_VV(v0, v0, d1, 1);
break;
case 0xCD:
VSLIDEDOWN_VI(d0, v1, 2, 1);
VSLIDEUP_VI(d0, vz, 2, 1);
VROR_VI(d1, d0, 17, 1);
VROR_VI(q1, d0, 19, 1);
VXOR_VV(d1, d1, q1, 1);
VSRL_VI(q1, d0, 10, 1);
VXOR_VV(d1, d1, q1, 1);
VADD_VV(v0, v0, d1, 1);
VSLIDEUP_VI(d0, vz, 0, 1);
VSLIDEUP_VI(d0, v0, 2, 1);
VROR_VI(d1, d0, 17, 1);
VROR_VI(q1, d0, 19, 1);
VXOR_VV(d1, d1, q1, 1);
VSRL_VI(q1, d0, 10, 1);
VXOR_VV(d1, d1, q1, 1);
VADD_VV(v0, v0, d1, 1);
break;
}
if (!MODREG) PUTEX_vector(v1, VECTOR_SEW32);
break;
}
if (MODREG) {
ed = (nextop & 7) + (rex.b << 3);
sse_reflect_reg(dyn, ninst, x6, ed);
Expand Down
58 changes: 58 additions & 0 deletions src/dynarec/rv64/dynarec_rv64_660f38.c
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Original file line number Diff line number Diff line change
Expand Up @@ -35,13 +35,15 @@ uintptr_t dynarec64_660F38(dynarec_rv64_t* dyn, uintptr_t addr, uint8_t opcode,
int64_t j64;
uint64_t tmp64u, tmp64u2;
int v0, v1;
int v2;
int q0, q1;
int d0, d1, d2;
int64_t fixedaddress, gdoffset;
int unscaled;

MAYUSE(d0);
MAYUSE(d1);
MAYUSE(v2);
MAYUSE(q0);
MAYUSE(q1);
MAYUSE(eb1);
Expand Down Expand Up @@ -723,6 +725,18 @@ uintptr_t dynarec64_660F38(dynarec_rv64_t* dyn, uintptr_t addr, uint8_t opcode,
case 0xDB:
INST_NAME("AESIMC Gx, Ex"); // AES-NI
nextop = F8;
if (cpuext.zvkned) {
SET_ELEMENT_WIDTH(x1, VECTOR_SEW32, 1);
GETGX_vector(v0, 1, VECTOR_SEW32);
GETEX_vector(v1, 0, 8, VECTOR_SEW32);
v2 = fpu_get_scratch(dyn);
MOV32w(x4, 0x63636363);
VMV_V_X(v2, x4);
VAESDM_VV(v2, v1);
VMV_V_V(v0, v2);
if (!MODREG) PUTEX_vector(v1, VECTOR_SEW32);
break;
}
GETGX();
GETEX(x2, 0, 8);
SSE_LOOP_MV_Q(x3);
Expand All @@ -733,6 +747,14 @@ uintptr_t dynarec64_660F38(dynarec_rv64_t* dyn, uintptr_t addr, uint8_t opcode,
case 0xDC:
INST_NAME("AESENC Gx, Ex"); // AES-NI
nextop = F8;
if (cpuext.zvkned) {
SET_ELEMENT_WIDTH(x1, VECTOR_SEW32, 1);
GETGX_vector(v0, 1, VECTOR_SEW32);
GETEX_vector(v1, 0, 8, VECTOR_SEW32);
VAESEM_VV(v0, v1);
if (!MODREG) PUTEX_vector(v1, VECTOR_SEW32);
break;
}
GETG;
sse_forget_reg(dyn, ninst, x6, gd);
if (MODREG && gd == (nextop & 7) + (rex.b << 3)) {
Expand All @@ -754,6 +776,14 @@ uintptr_t dynarec64_660F38(dynarec_rv64_t* dyn, uintptr_t addr, uint8_t opcode,
case 0xDD:
INST_NAME("AESENCLAST Gx, Ex"); // AES-NI
nextop = F8;
if (cpuext.zvkned) {
SET_ELEMENT_WIDTH(x1, VECTOR_SEW32, 1);
GETGX_vector(v0, 1, VECTOR_SEW32);
GETEX_vector(v1, 0, 8, VECTOR_SEW32);
VAESEF_VV(v0, v1);
if (!MODREG) PUTEX_vector(v1, VECTOR_SEW32);
break;
}
GETG;
sse_forget_reg(dyn, ninst, x6, gd);
if (MODREG && gd == (nextop & 7) + (rex.b << 3)) {
Expand All @@ -775,6 +805,26 @@ uintptr_t dynarec64_660F38(dynarec_rv64_t* dyn, uintptr_t addr, uint8_t opcode,
case 0xDE:
INST_NAME("AESDEC Gx, Ex"); // AES-NI
nextop = F8;
if (cpuext.zvkned) {
SET_ELEMENT_WIDTH(x1, VECTOR_SEW32, 1);
GETGX_vector(v0, 1, VECTOR_SEW32);
GETEX_vector(v1, 0, 8, VECTOR_SEW32);
if (v0 == v1) {
v2 = fpu_get_scratch(dyn);
VMV_V_V(v2, v1);
v1 = v2;
}
v2 = fpu_get_scratch(dyn);
VXOR_VV(v2, v2, v2, 1);
VAESDF_VV(v0, v2);
v2 = fpu_get_scratch(dyn);
MOV32w(x4, 0x63636363);
VMV_V_X(v2, x4);
VAESDM_VV(v2, v0);
VXOR_VV(v0, v2, v1, 1);
if (!MODREG) PUTEX_vector(v1, VECTOR_SEW32);
break;
}
GETG;
sse_forget_reg(dyn, ninst, x6, gd);
if (MODREG && gd == (nextop & 7) + (rex.b << 3)) {
Expand All @@ -797,6 +847,14 @@ uintptr_t dynarec64_660F38(dynarec_rv64_t* dyn, uintptr_t addr, uint8_t opcode,
case 0xDF:
INST_NAME("AESDECLAST Gx, Ex"); // AES-NI
nextop = F8;
if (cpuext.zvkned) {
SET_ELEMENT_WIDTH(x1, VECTOR_SEW32, 1);
GETGX_vector(v0, 1, VECTOR_SEW32);
GETEX_vector(v1, 0, 8, VECTOR_SEW32);
VAESDF_VV(v0, v1);
if (!MODREG) PUTEX_vector(v1, VECTOR_SEW32);
break;
}
GETG;
sse_forget_reg(dyn, ninst, x6, gd);
if (MODREG && gd == (nextop & 7) + (rex.b << 3)) {
Expand Down
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