Nightly run for OpenSBI tests

.github/workflows/ci.yml

@@ -86,8 +86,9 @@ jobs:
           MAKEFLAGS="-j$JOBS" fusesoc --cores-root=. run --target=sim --tool=verilator --setup --build lowrisc:mocha:top_chip_verilator
 
       - name: Run verilator software tests
+        # Exclude tests marked 'slow' from quick CI runs.
         run: |
-          ctest --test-dir build/sw -R sim_verilator --output-on-failure -j $(nproc)
+          ctest --test-dir build/sw -R sim_verilator -LE slow --output-on-failure -j $(nproc)
 
   fpga-cache-check:
     runs-on: ["self-hosted", "nixos", "X64"]
@@ -112,7 +113,6 @@ jobs:
           key: ${{ steps.hash-bitstream.outputs.hash }}
           lookup-only: true
 
-
   fpga-build:
     if: needs.fpga-cache-check.outputs.cache-hit != 'true'
     runs-on: ["ubuntu-22.04-bitstream"]
@@ -122,7 +122,7 @@ jobs:
     steps:
       - uses: actions/checkout@v5
 
-       # This step is a workaround and should be removed when the container is fixed.
+        # This step is a workaround and should be removed when the container is fixed.
       - name: Uninstall Nix
         run: |
           sudo rm -rf /etc/nix /etc/profile.d/nix.sh /etc/tmpfiles.d/nix-daemon.conf \
@@ -156,7 +156,7 @@ jobs:
     steps:
       - uses: actions/checkout@v5
 
-       # This step is a workaround and should be removed when the container is fixed.
+        # This step is a workaround and should be removed when the container is fixed.
       - name: Uninstall Nix
         run: |
           sudo rm -rf /etc/nix /etc/profile.d/nix.sh /etc/tmpfiles.d/nix-daemon.conf \
@@ -188,6 +188,7 @@ jobs:
           nix run .#bitstream-load
 
       - name: Run FPGA tests
+        # Exclude tests marked 'slow' from quick CI runs.
         shell: "nix develop -c bash -e {0}"
         run: |
-          ctest --test-dir build/sw -R fpga --output-on-failure
+          ctest --test-dir build/sw -R fpga -LE slow --output-on-failure

.github/workflows/nightly.yml

@@ -0,0 +1,44 @@
+# Copyright lowRISC Contributors (COSMIC project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: Nightly
+
+on:
+  schedule:
+    - cron: "00 02 * * *"
+
+jobs:
+  slow-verilator-test:
+    runs-on: ["self-hosted", "nixos", "X64"]
+
+    defaults:
+      run:
+        shell: "nix develop -c bash -e {0}"
+
+    steps:
+      - uses: actions/checkout@v5
+
+      - name: Prepare Nix environment
+        run: |
+          true
+
+      - name: Generate software buildsystem
+        run: |
+          cmake -B build/sw -S sw
+
+      - name: Build software
+        run: |
+          cmake --build build/sw -j $(nproc)
+
+      - name: Build verilator
+        run: |
+          JOBS=$(($(nproc) / 4))
+          MAKEFLAGS="-j$JOBS" fusesoc --cores-root=. run --target=sim --tool=verilator --setup --build lowrisc:mocha:top_chip_verilator
+
+      - name: Run Slow Verilator tests
+        # Display the tests that are about to be ran with '--show-only' first.
+        run: |
+          ctest --test-dir build/sw -R sim_verilator -L slow --show-only
+
+          ctest --test-dir build/sw -R sim_verilator -L slow --output-on-failure

sw/cmake/opensbi.cmake

@@ -77,4 +77,29 @@ function(mocha_opensbi_with_payload PAYLOAD_TARGET)
   )
 endfunction()
 
-mocha_opensbi_with_payload(opensbi_test_payload)
+# Like mocha_opensbi_with_payload, but also adds a test for
+# Verilator and FPGA environments.
+# TODO: Integrate this with the build system better.
+function(mocha_opensbi_with_payload_test PAYLOAD_TARGET)
+  # name of the target OpenSBI build.
+  set(NAME opensbi_with_${PAYLOAD_TARGET})
+
+  mocha_opensbi_with_payload(${PAYLOAD_TARGET})
+
+  add_test(
+      NAME ${NAME}_sim_verilator
+      COMMAND ${PROJECT_SOURCE_DIR}/../util/verilator_runner.sh -E $<TARGET_FILE:bootrom> -E ${NAME}/fw_payload.elf
+  )
+
+  add_test(
+      NAME ${NAME}_fpga_genesys2
+      COMMAND ${PROJECT_SOURCE_DIR}/../util/fpga_runner.py ${NAME}/fw_payload.elf
+  )
+
+  set_property(TEST ${NAME}_sim_verilator PROPERTY TIMEOUT 7200)
+  set_property(TEST ${NAME}_sim_verilator PROPERTY LABELS opensbi verilator slow)
+  set_property(TEST ${NAME}_fpga_genesys2 PROPERTY TIMEOUT 60)
+  set_property(TEST ${NAME}_fpga_genesys2 PROPERTY LABELS opensbi fpga)
+endfunction()
+
+mocha_opensbi_with_payload_test(opensbi_test_payload)

sw/cmake/tests.cmake

@@ -84,7 +84,7 @@ set(ARCHS_FLAGS           VANILLA_FLAGS       CHERI_FLAGS ) # Flags
 function(mocha_add_test)
     # parse arguments
     set(options SKIP_FPGA SKIP_VERILATOR)
-    set(one_value_args NAME TIMEOUT)
+    set(one_value_args NAME FPGA_TIMEOUT VERILATOR_TIMEOUT)
     set(multi_value_args SOURCES LIBRARIES)
     cmake_parse_arguments(arg "${options}"
         "${one_value_args}" "${multi_value_args}" ${ARGN})
@@ -119,11 +119,11 @@ function(mocha_add_test)
         endif()
 
         if(NOT arg_SKIP_VERILATOR)
-          mocha_add_verilator_test(NAME ${NAME} ROM bootrom TIMEOUT ${arg_TIMEOUT})
+          mocha_add_verilator_test(NAME ${NAME} ROM bootrom TIMEOUT ${arg_VERILATOR_TIMEOUT})
         endif()
 
         if(NOT arg_SKIP_FPGA)
-          mocha_add_fpga_test(NAME ${NAME} TIMEOUT ${arg_TIMEOUT})
+          mocha_add_fpga_test(NAME ${NAME} TIMEOUT ${arg_FPGA_TIMEOUT})
         endif()
     endforeach() # ARCH
 endfunction()

sw/device/tests/CMakeLists.txt

@@ -4,7 +4,7 @@
 
 set(LIBS hal runtime startup test_framework)
 
-mocha_add_test(NAME test_framework_test SOURCES test_framework/smoketest.c LIBRARIES ${LIBS} TIMEOUT 20)
+mocha_add_test(NAME test_framework_test SOURCES test_framework/smoketest.c LIBRARIES ${LIBS})
 mocha_add_test(NAME test_framework_exception_test SOURCES test_framework/exception.c LIBRARIES ${LIBS})
 mocha_add_test(NAME axi_sram_smoketest SOURCES axi_sram/smoketest.c LIBRARIES ${LIBS})
 mocha_add_test(NAME axi_sram_tag_test SOURCES axi_sram/tag_test.c LIBRARIES ${LIBS})