model: add GLM-5-Next (GLM-5.3-Flash) - #27754
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Metadata and tensor loading only. The graph entry point throws, as qwen4exp did at the same stage. kda.gate_lower_bound is read as required: kimi-k3 selects the softplus branch when it is absent, which is a different function rather than a missing clamp. The absorbed MLA projections are 3D, so glm5next joins bailingmoe3 in the MXFP4 carve-out that would otherwise quantize them as expert tensors.
glm5next's mHC is DeepSeek-V4's hyper-connection block: same wide residual, same 24-row mixer split, same two activations, same Sinkhorn. Only the final collapse differs, so the graph derives from llama_model_deepseek4::graph and reuses build_hc_pre / build_hc_post / build_hc_sinkhorn rather than restating them, as graph_dsv4 already does in dflash.cpp. dsv4_hc_mean becomes a static member so both archs can reach it; the body and both deepseek4 call sites are otherwise untouched. The generated code for deepseek4 is unchanged apart from the endbr64 landing pad the helper now needs as a global symbol. The four streams start as exact copies of the token embedding and collapse to an unweighted mean after the last layer: this checkpoint has no hc_head. KDA, DSA and the MoE land in later commits, so the two sublayers throw. The mHC wiring around them is final.
Copy-adapts kimi-k3's KDA layer rather than kimi-linear's or bailingmoe3's: it already matches on the recurrence ordering, the bounded-sigmoid decay gate and its branch selection, dt_bias added per channel before the reshape, per-head A broadcast, SiLU after the conv, f/g/beta read from the pre-convolution hidden states, and the gated output RMSNorm with a plain weight. Three differences from kimi-k3. The output gate is low rank, g_b(g_a(x)) as in kimi-linear, which is what PR 1's converter emits. The q/k L2 eps is a literal 1e-6, the reference's own constant, not f_norm_rms_eps; ggml_l2_norm implements max(sqrt(sum), eps) rather than sqrt(sum + eps), which at head_dim 128 differs by about eps/(2*sum) and never trips the clamp, so it is close but not bit-exact. And the cross-layer residual, latent MoE, situ activation and MLA output gate have no counterpart here. The conv follows the reference and convolves q|k|v as one depthwise kernel, which keeps the conv state a single contiguous block so build_conv_state can snapshot it. That plus build_recurrent_attn is what makes the layer safe under recurrent-state rollback, so the arch joins llm_arch_supports_rs_rollback; without that entry the guard in llama_context silently clamps n_rs_seq to 0. build_delta_net_autoregressive reshaped a per-channel KDA gate onto ne1, but ne0 is the key axis everywhere else in that function, so it decayed along the value axis. Invisible for GDN, where the gate is scalar and both spellings produce the same [1, 1, H_v, n_seqs], and invisible to the shape checks because S_k == S_v. Fixed rather than asserted around, since glm5next reaches that path on any backend without the fused operator. llama_model_deepseek4::graph now derives from llm_build_delta_net_base so glm5next, which derives from it for the mHC residual, can reach build_delta_net. The base is a method-only mixin over llm_graph_context with no data members and no virtuals beyond the destructor llm_graph_context already has; deepseek4.cpp, dflash.cpp and kimi-k3.cpp compile to byte-identical instructions across the change. graph_max_nodes moves the arch to kimi-k3's tier. Measured on the Tiny fixture with the chunked fallback: 182 nodes plus 15/16 per token for each KDA layer and 46 per layer for the mHC mixers, so the 45-layer model needs 8.3k + 31.9 per token before DSA or the MoE are counted, which overruns the n_tokens*40 budget. test-llama-archs synthesised no MLA, hyper-connection, kpool or expert-weight keys for glm5next, so PR 1's required get_key calls threw out of the sweep and truncated it at 75 of 143 architectures. The fixture is complete now and the row is skipped explicitly while the DSA and feed-forward sublayers still throw.
The routing is DeepSeek-V3 noaux_tc exactly as build_moe_ffn already implements it: sigmoid scores, exp_probs_b added for the top-k SELECTION only, weights gathered from the unbiased scores, normalised, then scaled by routed_scaling_factor. n_group and topk_group are both 1, so the group-limited stage is degenerate and build_moe_ffn's n_expert_groups > 1 guard skips it; no group keys are written and none are needed. The clamp is the one thing that needed a change outside this arch. glm5next clamps the gate max-only and the up symmetrically, both BEFORE the SiLU, which is what the branch behind the DEEPSEEK4/DFLASH arch gate already does; the else branch clamps after the SiLU and is a different function. Adding the arch to both gates reuses it rather than restating it. The two conditions are separate because the dense path and the MoE path read different hparams arrays. The leading dense layers clamp too. The reference builds them from the same Glm5NextTextMLP as the shared expert, so swiglu_limit is not MoE-only, and the converter already writes swiglu_clamp_shexp for every layer rather than only the sparse ones. The shared expert is added unscaled.
nope-only MLA in the absorbed form, over every cached position. below index_topk + index_kpool - 1 resident tokens the indexer selects all of them, so this is exactly what the sparse path degenerates to, and it is a reference the sparse commit can be checked against. the attention half of the hybrid memory becomes the K-only variant: after absorption the cache holds the kv_lora_rank latent and V is a view of K.
both are required keys for glm5next, so a model saved without them cannot be loaded back. this is what stops test-llama-archs from round-tripping the arch.
the DSA sublayer no longer throws, so the arch can construct and run. it needs the MLA head shape as well: with n_head_kv taken from the per-layer array it would size the K cache row n_head times wider than the latent the graph writes.
index_topk + index_kpool - 1 is the number of positions the indexer keeps, and it is what makes the dense attention this branch builds exactly equal to the sparse path below that many cached tokens. an off-by-one in it is invisible to every output comparison measured so far, on both a dense and a sparse fixture, so it is checked against a second spelling of the same arithmetic instead.
The DSA layers of this model score pools of index_kpool consecutive positions
rather than single keys, and the pooled key cannot be rebuilt from the MLA
latents. llama_memory_hybrid therefore gains an optional third cache holding one
indexer key and one compressor gate per token, so the hybrid carries the KDA
conv+recurrent state, the MLA latents and the indexer keys at once.
Absent unless filter_idx is given, which defaults to null, so every existing
architecture gets exactly what it got before, state file layout included.
Two heads per cell, not one. GLM's compressor is not a mean pool: it is a
per-channel softmax over the kpool slots with logits gate + ape, where the gate
is a second projection of the hidden state of width indexer_head_size. Caching
it beside the key is the only way a pool survives its member tokens leaving the
batch. Architectures with indexer_kpool == 0 still get one head.
The indexer cache is handed the attention cache's slot layout rather than
finding its own, so the two agree cell for cell, and apply() asserts they do.
It also keeps its own dtype: -ctk q8_0 would otherwise quantise the gates, which
feed a softmax.
llama-kv-cache-kpool.{h,cpp} builds the pool <-> cell map host side. Pools are
defined on positions and cells are whatever find_slot handed out, so the
correspondence cannot be derived in the graph. Nothing here emits a negative
index: ggml_set_rows asserts i1 >= 0, so unpopulated entries are clamped into
range and neutralised by an additive -INFINITY instead.
Two things the map does that the qwen4exp shape it is ported from does not:
- the top-k budget is indexer_top_k exactly, with the always-selected tail
biased to -INFINITY so it spends none of it, and forced back in through a
host-built base mask for the scatter. indexer_top_k is a whole number of
pools, so the cut lands on a pool boundary; the reference's own output width
of indexer_top_k + kpool - 1 does not, and ggml_top_k is unordered among
equals on both CPU and CUDA.
- one map per ubatch, shared by every indexer layer, since nothing in it
depends on the layer. Measured on a 16 Ki cell cache with 512 tokens:
~4 ms once against ~4 ms x n_layers.
A unified cache with more than one sequence would let two sequences at the same
position pool each other's keys, so create_memory refuses it up front rather
than aborting mid-run.
tests/test-glm5next-memory.cpp: 74 checks, 0 failures, on both the full and the
trunk-only fixture. test-llama-archs is byte identical to the same build without
this commit at a fixed seed: 452 rows, 0 FAIL. Session state files for
qwen3next, falcon-h1, minimax-01, qwen35moe and a real Falcon-H1-0.5B are byte
identical too, across write, reload and rewrite.
Builds the pooled lightning indexer and gives the DSA layers a sparse attention path driven by it. Top-k runs over the POOL axis at select_k = index_topk/index_kpool, and the selected pools are expanded to their member cells through pool_cells. That is the reference's own two-step (modular_glm5_next.py, Glm5NextTextIndexer.forward: topk over the pool axis, then selected_indices = pool_indices[batch_idx, selected]), and it is not interchangeable with a single top-k of width index_topk over member cells. The argument for the cell-level form - a pool's members carry its score bit-exactly, so the cut must land on a pool boundary - assumes tie groups never span pools. They do: ReLU drives most pool scores to exactly 0.0, and ggml_top_k is explicitly unordered among equals, so the cut falls inside an inter-pool tie group and splits a pool. Measured on TinySparse at 512 tokens, the cell-level form leaves a partial pool on 7.51% of query rows at layer 3 and 5.93% at layer 7; this form leaves none. The indexer key and gate STORE is unconditional; only the SCORING is gated, on n_ctx > index_topk + index_kpool - 1. Gating the store the same way would leave every cell written below n_select with no indexer state, and the first ubatch to cross n_select would pool cells that were never written. Nothing here changes any other architecture: test-llama-archs produces a table byte-identical to the parent's, 300 rows over 143 archs, 0 FAIL.
The tower is the GLM-OCR ViT with a clamped SwiGLU: the gate is bounded above only, the up projection on both sides, and both before the SiLU. ggml_swiglu_oai clamps the same way but then adds one to the up branch, which is a gpt-oss detail this model does not share, so this adds an FFN_SILU_CLAMP op rather than reusing it. The clamp sits at the per-block MLP and again at the merger. Both read hparams.ffn_op, so the graph body stays the GLM-4V one and the pair is covered together. It gets its own projector type rather than a flag on glm4v because the image token limits differ (16/8000 against 8/4096, per the GLM-5.3-Flash preprocessor) and those are hardcoded per projector, and because the clamp must stay off for GLM-4V and GLM-OCR. Also writes clip.vision.spatial_merge_size. No GLM4V-family mmproj has ever carried it: Glm4VVisionModel skips the Qwen3VL parameters, which is where it is written, so clip.cpp's hardcoded 2 has been carrying it. Images only. glm5next spells video with its own token pair and distinct start/end spans, and that is not handled here.
the vision tower shipped with the shared dynamic-size preprocessor, which is a qwen-style smart_resize. the 2026-08-26 GLM-5-Next adaptation resizes differently: both edges are aligned up by ceil rather than round, an over-budget image is fitted by binary searching the content height for the largest aligned canvas still within max_pixels, and the resized content is pasted into the top-left of that canvas rather than centred and stretched to fill it. an image already at or above min_pixels is never upscaled. min_pixels/max_pixels stay in tokens. the reference scales them by temporal_factor * factor**2 and compares against aligned_frames * area, and aligned_frames equals temporal_factor for a still image, so the two cancel and hparams.image_min_pixels / image_max_pixels (16 and 8000 tokens, 12544 and 6272000 pixels) are used directly. glm4v and glm-ocr keep the dynamic-size preprocessor. images only. video has its own token pair (154855, distinct from the image token 154854) with its own start/end spans, and is out of scope here. the resize arithmetic is covered in test-mtmd-impl against values taken from the reference processor, including the 16- and 8000-token boundaries, extreme aspect ratios, and inputs where the binary search and smart_resize disagree.
glm4 / chatglm-bpe tokenizer.json files set "ignore_merges": true, meaning a pre-token that is already a vocab entry is emitted directly and the merge loop never runs. llama.cpp implements this (llama-vocab.cpp, the get_ignore_merges() short-circuit) but only enables it for a hardcoded list of pre-tokenizer names, and glm4 was never added. Without it the merges are applied - correctly - and reach a different answer, because greedy BPE cannot always reconstruct a vocab entry from its bytes. " 王" (Ġçİĭ, id 102322) is the case that exposed it: from Ġ ç İ ĭ the only merges available are (Ġ,ç)=27944, (ç,İ)=76417 and (çİ,ĭ)=239209, so the lowest rank wins first and yields Ġç İ ĭ, at which point neither (Ġç,İ) nor (İ,ĭ) exists and it stops three tokens short. Reaching Ġçİĭ needs (Ġ,çİĭ) at 242943, which requires never taking (Ġ,ç) at 27944. The trigger is whitespace immediately before a CJK character, so pure Chinese prose is unaffected and mixed Chinese-English is not: pure Chinese prose 620 vs 620 tokens, already identical mixed Chinese-English 680 -> 600 tokens, now identical to HF (-13.3%) wikitext-2 (289569 tok) one divergence -> byte-identical Found while comparing GLM-5.3-Flash perplexity against transformers, vLLM and SGLang: the mismatch bounded how many scoring windows could be compared at long context, and reads exactly like a model-port defect rather than a tokenizer one.
The scripted resolution used for the rebase mangled four files: it spliced a
condition into the middle of graph_max_nodes' multi-line else-if, dropped the
mtmd_image_preprocessor_glm5next declaration, dropped llama-kv-cache-kpool.cpp
from src/CMakeLists.txt (undefined llama_kpool_* and the llm_graph_input_kpool
vtable at link time), and left an "} else {" immediately followed by an
"} else if" in test-llama-archs.
These files are byte-identical between this base and the tree the glm5next
work was verified on, so each is taken from there verbatim.
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Hi @danielhanchen, thanks for your contribution! Per our contribution guidelines, the automated PR checker found the following issue(s) that need your attention:
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deepseek4 sets n_embd_out_impl to hc_mult*n_embd to size its MTP h input. glm5next inherited that, but our t_embd is build_norm(build_hc_mean(...)), which is [n_embd, n_tokens]. n_embd_out() therefore reported 4*n_embd while the tensor held n_embd, and llama-context read n_outputs*n_embd_out floats out of it, four times what is there. The assert at that site sizes the destination buffer, so nothing catches the short source. Only --embeddings and llama_get_embeddings* reach the path, which is why plain generation never showed it. Note for when the NextN graph starts consuming h: give MTP its own width rather than widening n_embd_out again.
The mHC residual mixers, the lightning indexer (selection gate, learned k-pool position table, and the three indexer projections) and the KDA recurrence gates are about 1 GiB in total on GLM-5.3-Flash, so the size cost is noise against a 100-240 GB quant. Quantizing them perturbs which pools the indexer selects and how much state each KDA step retains, and those errors compound along a sequence rather than averaging out. Both spellings are required. The compressor tensors arrived with the DeepSeek-V4 merge and use an underscore (indexer_compressor_ape / _gate), while the projections use a dot (indexer.proj / .attn_k / .attn_q_b), so a single "indexer." prefix test silently misses the compressor pair. attn_q_a, attn_kv_a_mqa, attn_k_b and attn_v_b are deliberately not listed. They are precision sensitive too, but the release recipe pins them to q8_0 via --tensor-type, and that is the configuration the shipped quants were measured in. Verified with llama-quantize --dry-run q4_k_m on the BF16: all 12 pinned families report 0 quantized (45 mHC, 12 indexer, 34 KDA each), while ffn_gate_exps 43/43, attn_q_a 12/12 and attn_output 46/46 still quantize.
The 101-line glm5next block was dropped from test-mtmd-impl.cpp when the vision work was rebased, even though the commit message still claimed the resize arithmetic was covered there. It holds the 36-case table over the 16- and 8000-token budget boundaries, including six cases annotated as ones where a naive smart_resize disagrees, so it is the guard against sliding back to stretch-to-fill instead of ceil-align plus zero pad. Restored from 29c096371. test-mtmd-impl now runs 216 assertions, of which glm5next_resize contributes 185.
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Two changes since the last update. Both measured on 1x B200, GLM-5.3-Flash UD-IQ1_S, all layers offloaded, one GPU, 1. Cache the pooled indexer key in the KV row. The indexer rebuilt every pool's key from the whole cache on every decode step, in all 12 indexer layers. It is now computed once when a pool closes and kept in a third head of that cell's row.
2.4x at 64K, and decode falloff from d0 to d65536 goes from -67% to -22%. 2. MTP / NextN speculative decoding,
+48% at n=2, +40% at n=3 after a 16K prompt. No new GGUF is needed: the NextN block already ships in the released quants ( Neither change affects the default path: greedy output is byte identical to before, one chunk perplexity is unchanged at 3.3612 +/- 0.40158 with and without One caveat: on this 1.58bpw quant, greedy output with MTP can diverge from non-speculative decoding partway through a long generation. Both stay coherent. I have not yet separated batched versus single token numerics from an acceptance issue, so treat the equivalence as unproven. |
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Quick verification of
So the caching change neither fixes nor shifts the collapse — consistent with your byte-identical greedy check; the defect predates the rewrite and survives it. Whatever produces the The depth-decode win reproduces on Metal, a bit smaller than your B200 numbers at this deeper point: ~4.7 t/s decode at 96K depth on |
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One more datapoint from outside this repo that fits the "pool/bias construction" suspicion: mlx-lm has an open fix for the same architecture family with the same failure shape — silent long-context collapse of the DSA indexer's top-k. There, Different framework and kernels, obviously — but it is the same class of defect this thread is circling: a reduction/normalization feeding the indexer selection going numerically wrong only at large tensor shapes, with a context-size-dependent onset. Given our measured boundary moves with |
# Conflicts: # src/llama-graph.cpp
seq_add only skipped the pooled-key rebuild when the shift itself was a multiple of kpool. That is not sufficient: a pool straddling p0 or p1 keeps some members and moves the rest, so it is regrouped no matter how the shift is aligned, and its cached pooled key goes stale while still looking complete. Both callers pass an arbitrary bound. The server's context shift uses n_keep + n_discard and its prompt-cache reuse uses the match head, so this is reachable in normal use: with --keep 39 and n_ctx 8192, n_discard is 4076 and p0 is 4115, which is a multiple-of-4 shift starting mid-pool. Also require both bounds to be pool-aligned. A negative p0 or p1 means "from the start" / "to the end", which no pool can straddle.
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CUDA SM120 before/after for 0069971 (indexer key caching): confirmed, with a remaining O(n_kv) term on the fa=0 path Same setup as my earlier comment (2x RTX PRO 6000 Blackwell, driver 580.173.02, CUDA 13.0.2, UD-IQ3_XXS,
With fa=1 the depth term drops from ~0.45 to ~0.063 µs per cached token (3.3x at 131k; d0 to d131k falloff goes from -81% to -38%). That reproduces your B200 result on SM120. With fa=0 the gain is much smaller: the slope goes from ~1.34 to ~0.97 µs per cached token, and it remains linear all the way out, so fa=0 is now 6.4x slower than fa=1 at 131k. Since |
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MTP divergence data point on UD-IQ3_XXS, SM120, a175dcd. Same prompt (a 16k-token stage-gated spec for a software-rendered Rubik's cube in HTML/canvas), same build, same quant, temp 1.0. With --spec-type draft-mtp --spec-draft-n-max 2: 84 t/s over a 13.5k-token generation at 16-30k ctx, draft acceptance 0.64, mean len 2.29; output was fluent and self-reported as verified, but the render had a geometry defect (sticker quads with no inset, so faces rendered solid). With MTP off, same prompt, the render was correct on the first attempt. Single pair at temp 1.0 so not conclusive, but consistent with the divergence you noted on IQ1_S; on a 3-bit quant it shows up as a subtle code-logic error rather than incoherence. If needed I can run more pairs or the same with --temp 0 if a deterministic comparison would help. Let me know |
The pin was 50 commits behind the PR head and sat before "Add MTP support", so the nightly shipped GLM-5-Next without the NextN draft head, without the master merge, and without the pooled-key shift fix. Verified against b10705 by replaying the resolve step: the new commit fetches from ggml-org, is a commit of ggml-org#27754, and merges onto the base plus the pins listed before it with no conflict. Unrelated, and not fixed here: ggml-org#25731 stops merging at b10705. Upstream ggml-org#27960 touched ggml/src/ggml-rpc/ggml-rpc.cpp, which the Inkling branch also edits, and additive_merge.py correctly refuses it. It merges on b10698, the base of the last shipped nightly, so the next run on a newer base will fail there until that branch is merged forward.
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I know there is another impl, but this impl has been validated and utilized by many folks and works fine. MTP is also added and long context is checked carefully |
Second reduction pass over the arch's comments: 405 comment lines on the branch's own added lines down to 234, no code changes. Deletes rather than reshortens. What stayed is limited to things whose absence would let a reader make a specific mistake: reference constants and sign conventions, the ordering and precision constraints the graph relies on, and the shapes of ggml tensors, whose type carries none.
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The collapse is microbatch-dependent, and First, at the known boundary from the bisection (
( Then
All on So the failure needs (depth, Perf cost of the workaround on Metal is modest: ~25% slower prefill at 249K depth (43.9 vs ~55 t/s), decode unchanged. Happy to bisect the exact failing (n_kv × n_ubatch) shape or run instrumented builds if useful. |
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Cross-backend datapoint on the depth-dependent repeating-token collapse, in case it helps isolate indexer logic vs backend: on the MLX path (mlx_vlm 0.6.17 Setup: M3 Ultra 512 GB, macOS 26.3,
No single-token runs at any depth; the 96K/128K outputs were the most detailed of the set. This spans the ~65–70K band reported here for Happy to run specific depths/configs on this hardware if useful for triangulation. |
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Cross-reference: the same boundary prompts reproduce the collapse on the independent implementation in #27752 as well (details and table posted there) — shallow control clean on both, boundaries within ~10%. Supports the shared-lineage indexer hypothesis rather than a defect unique to either PR. |
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Vision path validated end to end on real weights (CUDA SM120), via a self-converted mmproj Since no mmproj is published I converted one from the release checkpoint. Two tests: both with the UD-IQ3_XXS text model,
So both the mtmd-cli path and the server path are exercised on real weights, synthetic and photographic input. I can share the conversion recipe if it's useful for the Unsloth repo. |
Deep-context
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Upstream fix PR for the Metal |
5 participants
Adds support for GLM-5-Next (released as GLM-5.3-Flash), a 321.3B hybrid linear/sparse-attention MoE, plus its vision tower.
Running it
Two flags are currently required for correct output:
NVIDIA_TF32_OVERRIDE=0.ggml-cuda/common.cuhsetsCUBLAS_TF32_TENSOR_OP_MATHunconditionally, so every fp32 GEMM otherwise runs at 10 mantissa bits. On a fixture this moved top-1 agreement from 0.896 to 0.9995.-fa off.build_attn_mhacasts the F32 latent to F16 beforeggml_flash_attn_ext, which is the one place MLA cannot afford it.KV cache type is not a correctness requirement. f16 costs +0.0005 PPL at ctx 2048 and is 0.0018 lower at 4096, both within engine-to-engine noise.
Performance
1x B200, GLM-5.3-Flash UD-IQ1_S,
llama-bench -ngl 999 --flash-attn on -ctk f16 -ctv f16 -lm none -p 512 -n 32 -r 3. Before is f30bed8, after is 0069971.Perplexity over one chunk is unchanged at 3.3612 +/- 0.40158.
MTP / NextN speculative decoding
--spec-type draft-mtp.llama-cli -c 32768 --temp 0 --seed 0 -n 256:AI Usage
Used Claude and Local Models for testing, iteration and code design - manual verification of model / PR usage