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Add fabrics FI_HMEM support for CUDA grain payloads - #654
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Introduce host/device payload allocators, flow-options payload location, and OpenGrain/GetGrain Ex APIs so discrete flows can back grains with cuda-linear device memory, including gst testsrc/sink paths. Signed-off-by: Thomas True <ttrue@nvidia.com>
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Readers on the same node can open the writer's cudaMalloc buffers on another device when peer access is available, with same-GPU and two-GPU example skeletons. Signed-off-by: Thomas True <ttrue@nvidia.com>
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Move the CUDA allocator into libmxl-payload-cuda.so so libmxl can dlopen backends by name without linking cudart, while host and placeholder stay built in. Signed-off-by: Thomas True <ttrue@nvidia.com>
Advertise and require HMEM-capable verbs domains for device flows, register split host header + CUDA payload regions, and use process-local CUDA bounce buffers on egress when payloads are IPC-imported. Signed-off-by: Thomas True <ttrue@nvidia.com>
Each side keeps local cudaMalloc buffers and fabrics RDMA copies grains, with a same-machine rehearsal script and a two-pod skeleton. Signed-off-by: Thomas True <ttrue@nvidia.com>
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Summary
MXL_FABRICS_IFACE_CAP_HMEMfor device grain flows on verbscudaMallocbuffers and fabrics RDMA copies grains (fabrics-cuda-two-domain.sh,kube-fabrics-cuda-two-domain.yaml)Stacked on #653 — this branch includes the CUDA grain-payload commits. Please merge #653 first; those commits drop out of this PR’s diff after that.
Test plan
mxl-fabrics-ofi-tests "[ofi]"(ProviderConfig HMEM cases)mxl-gst-testsrc(CUDA options) → initiator; confirm ~30 grains/s both sides/tmpis expected to fail MR pin on this host; use/dev/shmSRC_GPU=0 DST_GPU=0 ./examples/scripts/fabrics-cuda-two-domain.shon a verbs/HMEM NIC