arch/risc-v/eic7700x: Add the CRG reset controller.

[Fishwaldo]

Summary

The Clock and Reset Generator holds the reset line for every block on the SoC,
and nothing in this port could see or move one. This registers all 324 lines
with the NuttX reset framework and lists them in /proc/reset.

• arch: Add the CRG reset controller. — assert, deassert, reset,
  status over 61 control registers
• boards: Report the reset lines at startup. — one line of boot output
• arch: Name the reset lines through procfs. — get_line, so the listing
  carries names
• boards: Enable the reset procfs entry. — the two board configurations

Design notes

Addressing. A line is its register index times thirty two plus its bit, so
decoding needs no table. The ids are sparse: 324 lines in a space of 1952.

Three masks per register. valid names the bits that are lines, rdonly
those the hardware will not let software drive, and critical those whose
assertion takes down the system asserting them: interconnect, DDR path, U84
cluster, and the configuration path back to this block. Critical lines are
still readable and releasable; only assert and reset refuse, with -EPERM.

The lines are active low, which the manual never states. Inferred from the
field naming (_rstn, _arstn, _prstn, _hrstn), the reset defaults, and
both vendor Linux drivers. Get it wrong and deassert asserts, so the evidence
is written out beside the table. It matches the hardware: uart0 reads
released while the console is printing.

Lines the manual omits are described rather than skipped: the GPIO resets
at 0x438, which the register table jumps straight past, and the translation
buffer and NPU E31 lines given only as reserved. Where an instance mapping is
missing, the assumption is recorded at the table row.

Registration writes nothing to the hardware.

Output

[CPU0] clk: registered 264 clocks, 0 failed
[CPU0] reset: 324 lines, 117 held

/proc/reset, abridged from 324 rows:

eic7700x-crg:
0    noc_nsp                  state:released reg:0x400 bit:0
224  hsp_axi                  state:released reg:0x41c bit:0
243  hsp_emmc_p               state:released reg:0x41c bit:19
288  i2c0                     state:asserted reg:0x424 bit:0
416  uart0                    state:released reg:0x434 bit:0
448  gpio0                    state:asserted reg:0x438 bit:0
1921 spi_slv                  state:released reg:0x4f0 bit:1

Ids naming no line return -ENODEV and the framework skips them, which is what
keeps the listing dense. The name table costs about 8 KiB and is built only
when CONFIG_RESET_PROCFS is.

Testing

Booted on the ESWIN EIC7700 EVB, TFTP loaded from U-Boot.

Compiled with -Wno-cpp -Werror in three configurations, the reset code being
option gated:

configuration	result
RESET_PROCFS=y	clean
RESET_PROCFS=n	clean
DEBUG_RESET=n, RESET_PROCFS=y	clean

tools/checkpatch.sh -c -u -m -g master..HEAD passes.

CONFIG_RESET_PROCFS depends on FS_PROCFS_REGISTER, so both board
configurations enable it; without it the symbol is dropped when the
configuration is regenerated and the entry never appears.

[github-actions]

MemBrowse Memory Report

No memory changes detected for:

• arduino-mega2560
• esp32-devkitc
• hifive1-revb
• mirtoo
• qemu-armv8a
• qemu-intel64
• rx65n-rsk2mb
• s698pm-dkit
• stm32-nucleo-f103rb

[acassis]

@Fishwaldo please fix the conflicts

[Fishwaldo]

I'll have to rebase this one after my other open PR lands as this will conflict as well.