Description / Steps to reproduce the issue
Enabling the SPI driver within the Kconfig, gives you the ability to set either the CS or MISO pins to -1 in case they're not used by the board.
However, the SPI Device hardware configuration has them defined as uint8_t, thus completely disabling this feature. See the snippet below:
/* arch/xtensa/src/esp32s3/esp32s3_spi.c, line 118 */
/* SPI Device hardware configuration */
struct esp32s3_spi_config_s
{
uint32_t clk_freq; /* SPI default clock frequency */
uint32_t width; /* SPI default width */
enum spi_mode_e mode; /* SPI default mode */
uint8_t id; /* ESP32-S3 SPI device ID: SPIx {2,3} */
uint8_t cs_pin; /* GPIO configuration for CS */
uint8_t mosi_pin; /* GPIO configuration for MOSI */
uint8_t miso_pin; /* GPIO configuration for MISO */
uint8_t clk_pin; /* GPIO configuration for CLK */
#ifdef CONFIG_ESP32S3_SPI_DMA
uint8_t periph; /* Peripheral ID */
uint8_t irq; /* Interrupt ID */
#endif
uint32_t clk_bit; /* Clock enable bit */
uint32_t rst_bit; /* SPI reset bit */
#ifdef CONFIG_ESP32S3_SPI_DMA
uint32_t dma_clk_bit; /* DMA clock enable bit */
uint32_t dma_rst_bit; /* DMA reset bit */
uint8_t dma_periph; /* DMA peripheral */
#endif
uint32_t cs_insig; /* SPI CS input signal index */
uint32_t cs_outsig; /* SPI CS output signal index */
uint32_t mosi_insig; /* SPI MOSI input signal index */
uint32_t mosi_outsig; /* SPI MOSI output signal index */
uint32_t miso_insig; /* SPI MISO input signal index */
uint32_t miso_outsig; /* SPI MISO output signal index */
uint32_t clk_insig; /* SPI CLK input signal index */
uint32_t clk_outsig; /* SPI CLK output signal index */
};Simply changing both cs_pin and miso_pin to int16_t resolves the issue, while still counting high number of GPIOs (>127)
On which OS does this issue occur?
[OS: Linux]
What is the version of your OS?
Fedora 44
NuttX Version
NuttX 13.0.1 b5f7b88-dirty
Issue Architecture
[Arch: xtensa]
Issue Area
[Area: Drivers]
Host information
No response
Verification
Description / Steps to reproduce the issue
Enabling the SPI driver within the Kconfig, gives you the ability to set either the CS or MISO pins to -1 in case they're not used by the board.
However, the SPI Device hardware configuration has them defined as
uint8_t, thus completely disabling this feature. See the snippet below:Simply changing both
cs_pinandmiso_pintoint16_tresolves the issue, while still counting high number of GPIOs (>127)On which OS does this issue occur?
[OS: Linux]
What is the version of your OS?
Fedora 44
NuttX Version
NuttX 13.0.1 b5f7b88-dirty
Issue Architecture
[Arch: xtensa]
Issue Area
[Area: Drivers]
Host information
No response
Verification