metal: exact-fp32 batched router matmul for GLM prefill (+4–8%), MoE staging ground truth - #953

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ivanfioravanti wants to merge 14 commits into

antirez:mainfrom

ivanfioravanti:exp/m5-tensor-precision

Commits on Sep 2, 2026

Add M5 TensorOps accumulate-precision probe (experiment only)
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f96dd8a
Probe op-run-count and fast-math dependence of the M5 drift
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a93b3b2
Probe: wait for the ds4 instance lock and fail loudly on run errors
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f7f24d6
Add f32-staged legacy routed-MoE measurement route
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aa83988
Probe: wait for the ds4 lock via python3 fcntl (macOS has no flock CLI)
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0644a68
metal/moe: repair the mpp_muladd_k16 probe kernel
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ebfdfcc
probe: add f32stage arm, mathsafe p1500, and direction stats
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2bbdee1
test: surgical routed-MoE ground truth vs exact CPU f32 reference
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bc68d6b
metal: f32-staged MPP routed-MoE route and route diagnostics
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056c7e5
test: recalibrate the tensor-equivalence gate by batch size
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19a3498
metal/moe: one-sided fp32-staged MPP arms (w32stage/a32stage) + GT arms
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02b81f7
metal/moe: templated MPP tile geometry, 8-simdgroup probe, K=64 canary
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a3bd183
metal/dense: fp32-staged batched router matmul (kernel_mul_mm_f32_f32)
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0d6f5ae
metal/dense: fall back to the router matvec if the f32 MM pipeline is missing
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d50828c