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8 changes: 8 additions & 0 deletions .github/workflows/build.yml
Original file line number Diff line number Diff line change
Expand Up @@ -31,3 +31,11 @@ jobs:
run: pip install platformio
- name: Build ${{ matrix.env }}
run: pio run -e ${{ matrix.env }}
- name: Upload test build
if: github.event_name == 'pull_request'
uses: actions/upload-artifact@v4
with:
name: testbuild-${{ matrix.env }}
path: firmware/**/*_factory.bin
if-no-files-found: warn
retention-days: 14
70 changes: 70 additions & 0 deletions .github/workflows/release.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,70 @@
name: release

on:
push:
tags: ['v*']

permissions:
contents: write

jobs:
build-release:
name: build ${{ matrix.env }}
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
# Every shipped target. post_build_merge.py writes
# firmware/<git-describe>/<friendly>_factory.bin and _firmware.bin.
env: [esp32-2432s028, esp32-2432s028-st7789, esp32-2432s028-2usb,
esp32-s3-2432s028, esp32-s3-devkit, esp32-s3-mini,
lilygo-t-display-s3, lilygo-t-display-v1,
esp32-headless, esp32-headless-led,
esp32-c3-supermini, esp32-c3-oled,
esp32-s3-oled, wemos-lolin32-oled, esp32-devkit-oled,
wireless-paper, wireless-paper-headless]
steps:
- uses: actions/checkout@v4
with:
fetch-depth: 0 # git describe drives the firmware/<version>/ output dir
- uses: actions/setup-python@v5
with:
python-version: '3.11'
cache: pip
- name: Cache PlatformIO
uses: actions/cache@v4
with:
path: ~/.platformio
key: pio-${{ runner.os }}-${{ hashFiles('platformio.ini') }}
restore-keys: pio-${{ runner.os }}-
- name: Install PlatformIO
run: pip install platformio
- name: Build ${{ matrix.env }}
run: pio run -e ${{ matrix.env }}
- name: Upload binaries
uses: actions/upload-artifact@v4
with:
name: firmware-${{ matrix.env }}
path: firmware/**/*.bin
if-no-files-found: error

release:
needs: build-release
runs-on: ubuntu-latest
permissions:
contents: write
steps:
- uses: actions/download-artifact@v4
with:
path: artifacts
merge-multiple: true
- name: Create release with binaries
env:
GH_TOKEN: ${{ github.token }}
run: |
shopt -s globstar
gh release create "${GITHUB_REF_NAME}" \
--title "${GITHUB_REF_NAME}" \
--prerelease \
--generate-notes \
artifacts/**/*.bin
16 changes: 16 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,22 @@

All notable changes to SparkMiner will be documented in this file.

## [v2.9.6-pre] - 2026-09-19

### Fixed
- **ESP32-S3 zero-shares bug** (#36, issues #28/#10/#5): core 1 now mines the first SHA in software (same proven path as core 0) instead of the broken hardware midstate restore. Root cause: the S3 SHA_H digest-state registers expect big-endian state words (espressif/esp-idf#12440) and the old code seeded little-endian — reported hashrate was real hash speed but no share ever validated. S3 now shows an honest ~50-55 KH/s with shares landing at the pool; a faster correct HW path is tracked in #28.
- **WiFi reconnect after AP reboot / AUTH_EXPIRE** (#37, issues #31/#29): the watchdog re-issues `WiFi.begin()` with the NVS-stored credentials instead of `WiFi.reconnect()`. README note for the macOS captive-portal probe.
- **Config portal: SSIDs with spaces** (#45): scan-list autofill read the HTML-escaped visible text (spaces became U+00A0); now reads `data-ssid`.
- **Block-height and fee stats silently dead** (#44): mempool.space 301-redirects its HTTP endpoints to HTTPS and HTTPClient does not follow redirects; endpoints now use HTTPS via the existing TLS paths.

### Added
- **ESP32-C3/S2 hardware SHA mining path** (#39, issue #34): legitimate START→CONTINUE full double-hash with no midstate injection, software-verify gate on every submission, and a one-shot boot self-test that falls back to the software miner if the register sequence disagrees with the chip.
- **`esp32-devkit-oled` board target** (#38, issue #26): generic ESP32 DevKit + SSD1306 128x64 OLED on SDA=21/SCL=22. Both OLED envs added to the CI matrix.
- **CI artifact upload** — every PR now publishes test-build factory binaries; tags build all targets and publish a GitHub Release automatically.

### Changed
- README hashrate tables now report honest, pool-verified numbers.

## [v2.9.3] - 2026-01-22

### Added
Expand Down
8 changes: 4 additions & 4 deletions README.md
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
# SparkMiner v2.9.5
# SparkMiner v2.9.6-pre

**High-performance Bitcoin solo miner for ESP32, ESP32-S3 & ESP32-C3**

Expand Down Expand Up @@ -167,8 +167,8 @@ Find your board below and download the matching firmware from [Releases](https:/
| Chip | Hashrate | Notes |
|------|----------|-------|
| **ESP32** (dual-core) | ~715 KH/s | Best performance, hardware SHA-256 |
| **ESP32-S3** (dual-core) | ~280-400 KH/s | Software SHA-256, more RAM |
| **ESP32-C3** (single-core) | ~200-300 KH/s | RISC-V, lowest power |
| **ESP32-S3** (dual-core) | ~50-55 KH/s | Every share software-verified (#36); faster HW path (~300+ KH/s) in progress — see [#28](https://github.com/SneezeGUI/SparkMiner/issues/28) |
| **ESP32-C3** (single-core) | TBD | HW SHA now wired with boot self-test (#39); software fallback ~1 KH/s. Numbers pending real-C3 validation ([#34](https://github.com/SneezeGUI/SparkMiner/issues/34)) |

### Board Compatibility Status

Expand Down Expand Up @@ -501,7 +501,7 @@ The display features color-coded indicators for quick health monitoring:
| Board | Device Display | Pool Reported | Power | Notes |
|-------|---------------|---------------|-------|-------|
| **ESP32-2432S028 (CYD)** | ~715-725 KH/s | ~715-725 KH/s | ~0.5W | Pipelined assembly v2 |
| **ESP32-S3 (Freenove)** | ~280 KH/s | ~400 KH/s | ~0.4W | Midstate caching v3 |
| **ESP32-S3 (Freenove)** | ~50-55 KH/s | ~50-55 KH/s | ~0.4W | Software-first SHA (#36); the old ~280-400 KH/s figures were invalid (zero shares accepted) |
| **ESP32 Headless** | ~750 KH/s | ~750 KH/s | ~0.3W | No display overhead |

> **Note:** Pool-reported hashrate is typically higher than device display due to share submission timing and pool difficulty adjustments.
Expand Down
26 changes: 13 additions & 13 deletions platformio.ini
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_2432S028=1
; Hardware SHA-256 via direct register access to SHA peripheral
-D HARDWARE_SHA256=1
Expand Down Expand Up @@ -168,7 +168,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_2432S028=1
; Hardware SHA-256 via direct register access to SHA peripheral
-D HARDWARE_SHA256=1
Expand Down Expand Up @@ -301,7 +301,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D LILYGO_T_DISPLAY_S3=1
-D USE_HARDWARE_SHA=1
-D BOARD_HAS_PSRAM
Expand Down Expand Up @@ -371,7 +371,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D LILYGO_T_DISPLAY_V1=1
-D USE_HARDWARE_SHA=1
-D USE_DISPLAY=1
Expand Down Expand Up @@ -496,7 +496,7 @@ upload_speed = 115200
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_S3_MINI=1
-D USE_HARDWARE_SHA=1
-D BOARD_HAS_PSRAM
Expand Down Expand Up @@ -536,7 +536,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_HEADLESS_LED=1
-D USE_HARDWARE_SHA=1
-D USE_DISPLAY=0
Expand Down Expand Up @@ -575,7 +575,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_C3_SUPERMINI=1
; Hardware SHA-256 via direct register access (full double-hash, no midstate
; restore -- midstate restore is unsupported on ESP32-C3). See issue #34.
Expand Down Expand Up @@ -610,7 +610,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_C3_OLED=1
; Hardware SHA-256 via direct register access (full double-hash, no midstate
; restore -- midstate restore is unsupported on ESP32-C3). See issue #34.
Expand Down Expand Up @@ -652,7 +652,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_S3_OLED=1
-D USE_HARDWARE_SHA=1
-D BOARD_HAS_PSRAM
Expand Down Expand Up @@ -699,7 +699,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
; ---- Board identity ----
-D WEMOS_LOLIN32_OLED=1
; ---- SHA implementation ----
Expand Down Expand Up @@ -747,7 +747,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_HEADLESS=1
-D USE_HARDWARE_SHA=1
-D BUTTON_PIN=0
Expand Down Expand Up @@ -778,7 +778,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D USE_DISPLAY=0
-D USE_EINK_DISPLAY=1
-D USE_HARDWARE_SHA=1
Expand Down Expand Up @@ -810,7 +810,7 @@ upload_speed = 921600
build_unflags = -Os

build_flags =
-D AUTO_VERSION=\"v2.9.5\"
-D AUTO_VERSION=\"v2.9.6-pre\"
-D ESP32_DEVKIT_OLED=1
; Cosmetic on classic ESP32 (ASM SHA auto-selected via CONFIG_IDF_TARGET_ESP32)
-D USE_HARDWARE_SHA=1
Expand Down
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