perf(agentx): sweep Kimi K3 with LMCache dev114 / 使用 LMCache dev114 扫描 Kimi K3 - #2889
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将 Kimi-K3 MI355X vLLM AgentX 的 LMCache 构建升级到 0.5.5.dev104+rocm7.2，保留既有配置并将并发扫描上限设为 48。
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Thanks for the contribution! Please reach out to respective companies' CODEOWNER to fill in the latest PR_REVIEW_CHECKLIST.md before pinging core maintainer on Slack for review. In order for the signoff PR check bot to trigger, you must follow the PR_REVIEW_CHECKLIST.md template correctly, including the phrase For PR verification, add the PR authors are responsible for ensuring that after merging, all GitHub Action jobs fully pass. A lot of the time, failures are just flakes and simply re-running the failed jobs will fix it. See GitHub's docs on re-running failed jobs 感谢你的贡献！请联系相应公司的 CODEOWNER 填写最新的 PR_REVIEW_CHECKLIST.md，然后再在 Slack 上联系核心维护者进行审阅。为了触发 signoff PR 检查机器人，你必须正确遵循 PR_REVIEW_CHECKLIST.md 模板，包括保留英文语句 如需进行 PR 验证，请为此 PR 添加 PR 作者有责任确保合并后所有 GitHub Action 任务完全通过。 很多时候失败只是偶发抖动（flake），重新运行失败的任务即可解决。参见 GitHub 关于重新运行失败任务的文档 |
将 Kimi-K3 LMCache dev104 扫描的性能变更日志链接更新为 PR #2889。
将 Kimi-K3 LMCache dev104 扫描的性能变更日志链接更新为 PR #2889。
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hyukjlee
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34244555813 |
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LGTM — straightforward version bump and doc fix.
What was reviewed: the LMCache version bump (0.5.5.dev89 to dev104) is applied consistently in both the benchmark script and configs/amd-master.yaml; the dcp-size:8 search-space also drops concurrency 52, matching the new changelog entry's stated "48 as the upper bound"; the docs change from pr-link: TBD to the pull/XXX placeholder was checked against utils/validate_perf_changelog.py, which only accepts XXX or the full pull/XXX URL as placeholders, not TBD — so the docs now match actual validator behavior; the new perf-changelog.yaml entry is appended at EOF with a valid placeholder link.
Extended reasoning...
Overview
This PR bumps the LMCache dev build used by the Kimi-K3 FP4 MI355X agentic MTP benchmark from 0.5.5.dev89+rocm7.2 to 0.5.5.dev104+rocm7.2, updating both the shell script (benchmarks/single_node/agentic/kimik3_fp4_mi355x_mtp.sh) and the corresponding config/amd-master.yaml search-space entries. It also trims the dcp-size:8 concurrency list from [44, 48, 52] to [44, 48], appends a matching perf-changelog.yaml entry, and fixes documentation (English and Chinese) plus the add-model-hardware slash command to reference the validator-supported pull/XXX placeholder instead of the unsupported TBD string for pr-link.
Security risks
None. This is a version pin bump and documentation/config text change; no code execution paths, auth, or secrets are touched. The LMCache index URL is unchanged (still the existing nightly-rocm GitHub releases index).
Level of scrutiny
Low-to-moderate. The change is mechanical (a version string swap in two files kept in sync) plus a docs/tooling consistency fix. I verified the actual validator regex in utils/validate_perf_changelog.py to confirm the placeholder fix is accurate rather than just take the PR's word for it, and cross-checked the config diff for the removed concurrency value against the new changelog description to make sure the entry accurately reflects the diff.
Other factors
The changelog entry is self-consistent with the diff (mentions the version bump and the 48 concurrency upper bound), is appended at EOF as required by repo conventions, and uses the pull/XXX placeholder that the schema now correctly documents. No test coverage changes were needed since this is a config/data change validated by existing changelog/config validators.
This review covers commit 5d52cb0, which is no longer the latest commit on this pull request; later commits are not covered by it.
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34244685837 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34247734093 |
移除与本次 Kimi K3 LMCache 扫描无关的占位符文档修改。
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34249687044 |
将 Kimi-K3 MI355X AgentX 的 LMCache 固定版本更新到当前可用的 ROCm nightly dev106。 Co-authored-by: OpenAI Codex <codex@openai.com> Signed-off-by: hyukjlee <hyukjlee@amd.com>
hyukjlee
changed the title
Resolves the perf-changelog.yaml append collision: main added the qwen3.5-fp8-b200-sglang (#2866) and dsv4-fp4-b200-sglang-agentic-hicache-mtp (#2821) entries at the same position this branch added its kimik3-fp4-mi355x-vllm-agentic-mtp entry. Kept all three, with this branch's entry last. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34301213411 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34249687044 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34301213411 |
2 similar comments
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34301213411 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34301213411 |
hyukjlee
changed the title
…-dev104-full-sweep # Conflicts: # perf-changelog.yaml
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34301213411 |
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Reviewed by Cursor Bugbot for commit a52fa38. Configure here.
| description: | ||
| - "Upgrade the Kimi-K3 MI355X vLLM AgentX LMCache build from 0.5.5.dev89+rocm7.2 to 0.5.5.dev114+rocm7.2 from the nightly ROCm release index; the rolling release no longer publishes the intermediate 0.5.5.dev104+rocm7.2 wheel." | ||
| - "Preserve the image, runtime settings, and topology from the full sweep in Actions run 33773561410; run concurrency 1 without offload and LMCache concurrencies 4, 8, 10, 12, 14, 44, and 48, with 48 as the upper bound." | ||
| pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2889 |
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Changelog entry not appended at end
Medium Severity
The new perf-changelog.yaml entry is inserted ahead of the existing #2851 block instead of after every historical entry. Merge-time validation requires a byte-for-byte historical prefix and treats prior entries as position-immutable, so this placement breaks the append-only changelog contract and will fail reuse-merge preparation.
Reviewed by Cursor Bugbot for commit a52fa38. Configure here.
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34332168553 |
2 similar comments
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34332168553 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34332168553 |
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/reuse-sweep-run |
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As a PR reviewer and CODEOWNER, I have reviewed this and have:
- Verified that as of the moment of typing this, this is the latest version of PR_REVIEW_CHECKLIST.md
- Verified that the general code quality meets the InferenceX standard and does not make the code quality any worse.
- Verified that this PR has passed PR validation. Please link to GitHub Action workflow that shows this.
- Verified that this PR passes evals. Please link to GitHub Action workflow that shows this.
- Verified that speculative decoding PRs uses chat templates to align the AL distribution to real world
- For agentic workloads: verified that speculative-decoding configs (EAGLE / MTP / draft models) run with simulated synthetic acceptance, with the acceptance-length value taken from the committed golden AL curve in golden_al_distribution/ for that model, thinking mode, and draft length. A submission may choose any supported draft length, but it may not substitute a different acceptance target.
- Verified against the current MODELS.md that this PR does not submit a deprecated model, scenario, or model-scenario combination.
- Verified that the model architecture isn't changed with benchmark hacks like using --hf-overrides to skipping indexer for every x layers on models that don't natively support this. As a general rule, we won't accept optimizations that reduces the number of model architecture FLOPs. Anything that makes that same computation run faster is fair game; FLOPs at lower precisions is fine, given that the config passes private evals. As an general north star princple, we should only use optimizations which is used in production by customers that care about accuracy
- If an company claims that they support vLLM/SGLang as first class LLM inference engines on their hardware, I have verified that the respective vLLM submission made using upstream https://hub.docker.com/u/vllm docker repo, upstream SGLang https://hub.docker.com/u/lmsysorg docker repo. The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet as supported by vLLM/SGLang community maintainers
- If an company claims that they support vLLM/SGLang as first class upstream in-tree LLM inference engines on their hardware, I have have verified that the respective vLLM/SGLang submission has been made before additional frameworks (TRT-LLM, ATOM, etc.). The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet.
- Verified that every single-node vLLM/SGLang recipe in this PR is documented in the official vLLM recipes and/or the SGLang cookbook:
- I linked the corresponding upstream PR in the vLLM recipe repo or SGLang repo and verified that it is MERGED before this InferenceX PR merges. An opened, draft, or closed-without-merge upstream PR does not satisfy this requirement. If the matching recipe was already published, I linked the published recipe/cookbook page in the additional detail section below.
- Verified that this PR does not patch the inference engine or serving stack — the pinned image must run as shipped. This covers .patch files / git apply / patch, inline patches embedded in benchmark scripts (e.g. a python3/sed heredoc that rewrites installed engine sources before serving), in-place edits of site-packages, monkey-patching, overwriting container files, and installing forked/rebuilt engine wheels on top of the pinned image. The only exception is a patch covered by a filled-out waiver at docs/waiver/
<PR_NUMBER>.md— named after the PR that introduces the patch and filed in that same PR, stating what is patched, why the unmodified upstream image cannot run this benchmark, the upstream PR/issue link, and the removal plan — which I have linked below in the additional detail section. - If this PR uses
append-only: true, verified that it only adds generated points or recipe variants inside a selected existing config/scenario and existing same-image visual curve: every previously generated point remains present with the same recipe, no prior point is removed or rerun, and every benchmark-affecting change in the complete diff can affect only the corresponding newly appended points (never an existing point), regardless of which file contains it. - If any of the above criteria cannot reasonably be satisfied, I have provided additional reasoning below.
Additional detail section:
- insert any additional info here
recipe at https://recipes.vllm.ai/moonshotai/Kimi-K3?hardware=mi355x&features=text_only%2Cspec_decoding%2Ctool_calling%2Creasoning&kv_offload=lmcache
Signed: seungrokj
✅✅✅ Verdict: PASS ✅✅✅✅ Check 0 (CODEOWNER): PASS — |
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@Oseltamivir @adibarra can you plz merge this ? |
4 participants
Summary
Bump Kimi-K3 MI355X vLLM AgentX from LMCache
0.5.5.dev89+rocm7.2to0.5.5.dev114+rocm7.2.The follow-up from
dev106todev114changes only the LMCache version pin. The image, runtime settings, topology, performance concurrency list, and agentic accuracy jobs remain unchanged.The
dev114CPython 3.12 x86_64 ROCm wheel was verified in the nightly ROCm release index.中文说明
将 Kimi-K3 MI355X vLLM AgentX 的 LMCache 从
0.5.5.dev89+rocm7.2升级到0.5.5.dev114+rocm7.2。本次从dev106到dev114的更新仅修改 LMCache 版本；镜像、运行参数、拓扑、性能并发列表和 Agentic 准确率任务均保持不变。Note
Low Risk
Dependency pin and benchmark matrix tuning only; no serving logic, auth, or infrastructure changes.
Overview
Bumps Kimi-K3 MI355X vLLM AgentX LMCache from
0.5.5.dev89+rocm7.2to0.5.5.dev114+rocm7.2in the agentic benchmark script and inkimik3-fp4-mi355x-vllm-agentic-mtpsearch-space pins (nightly ROCm index unchanged).For the DCP-size-8 + DRAM LMCache arm, the scheduled concurrency list is tightened from 44/48/52 to 44/48 so the sweep tops out at 48, matching the intended rerun scope documented in
perf-changelog.yaml. vLLM image, MTP topology, and non-LMCache points (e.g. conc 1 without offload) are not changed in this diff.Reviewed by Cursor Bugbot for commit b2f1f4f. Bugbot is set up for automated code reviews on this repo. Configure here.