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30 changes: 30 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-congo.dts
Original file line number Diff line number Diff line change
Expand Up @@ -875,6 +875,36 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
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why we do not include
compatible = "amd,sbtsi";

assigned-address = <0x4c>;
};

sbrmi_p0_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
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why we do not include
compatible = "amd,sbrmi";

assigned-address = <0x3c>;
};

sbtsi_p0_iod0_AB: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0_AB: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x3c>;
};

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Congo does not support SP8 IDs

sbtsi_p0_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x4c>;
};

sbrmi_p0_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x3c>;
};

scoob_p0: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand Down
30 changes: 30 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-kenya.dts
Original file line number Diff line number Diff line change
Expand Up @@ -565,6 +565,36 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x3c>;
};

sbtsi_p0_iod0_AB: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0_AB: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x3c>;
};

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Congo does not Support SP8

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I mean Kenya

sbtsi_p0_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x4c>;
};

sbrmi_p0_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x3c>;
};

scoob_p0: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand Down
102 changes: 102 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-morocco.dts
Original file line number Diff line number Diff line change
Expand Up @@ -943,6 +943,36 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x3c>;
};

sbtsi_p0_iod0_AB: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0_AB: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x3c>;
};

sbtsi_p0_sp8: sbtsi@0,2240000011A {
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Morocco does not support SP8 IDs
Should be added to Hornbill and Seagull

reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x4c>;
};

sbrmi_p0_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
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Morocco does not support SP8 IDs

assigned-address = <0x3c>;
};

scoob_p0: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand All @@ -964,6 +994,78 @@
i2c-scl-hz = <1000000>;
mctp-controller;

/* TSI Venice A0 2P */
sbtsi_p1_iod0: sbtsi@0,22401000118 {
reg = <0x0 0x224 0x01000118>;
assigned-address = <0x48>;
};

/* RMI Venice A0 2P */
sbrmi_p1_iod0: sbrmi@0,22401001118 {
reg = <0x0 0x224 0x01001118>;
assigned-address = <0x38>;
};

/* TSI Venice A0 2X1P */
sbtsi_2x1p_p1_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x48>;
};

/* RMI Venice A0 2X1P */
sbrmi_2x1p_p1_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x38>;
};

/* TSI Venice AB/B0 2P */
sbtsi_p1_iod0_AB: sbtsi@0,22401000119 {
reg = <0x0 0x224 0x01000119>;
assigned-address = <0x48>;
};

/* RMI Venice AB/B0 2P */
sbrmi_p1_iod0_AB: sbrmi@0,22401001119 {
reg = <0x0 0x224 0x01001119>;
assigned-address = <0x38>;
};

/* TSI Venice AB/B0 2x1P */
sbtsi_2x1p_p1_AB_iod0: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x48>;
};

/* RMI Venice AB/B0 2x1P */
sbrmi_2x1p_p1_AB_iod0: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x38>;
};

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Morocco does not support Sp8 IDs

/* TSI SP8 2P */
sbtsi_p1_sp8: sbtsi@0,2240100011A {
reg = <0x0 0x224 0x0100011A>;
assigned-address = <0x48>;
};

/* RMI SP8 2P */
sbrmi_p1_sp8: sbrmi@0,2240100111A {
reg = <0x0 0x224 0x0100111A>;
assigned-address = <0x38>;
};

/* TSI SP8 2x1P */
sbtsi_2x1p_p1_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x48>;
};

/* RMI SP8 2x1P */
sbrmi_2x1p_p1_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x38>;
};

scoob_2x1p_p1: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand Down
102 changes: 102 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-nigeria.dts
Original file line number Diff line number Diff line change
Expand Up @@ -714,6 +714,36 @@
i2c-scl-hz = <1000000>;
mctp-controller;

sbtsi_p0_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x3c>;
};

sbtsi_p0_iod0_AB: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x4c>;
};

sbrmi_p0_iod0_AB: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x3c>;
};

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Nigeria does not support SP8 IDs

sbtsi_p0_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x4c>;
};

sbrmi_p0_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x3c>;
};

scoob_p0: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand All @@ -735,6 +765,78 @@
i2c-scl-hz = <1000000>;
mctp-controller;

/* TSI Venice A0 2P */
sbtsi_p1_iod0: sbtsi@0,22401000118 {
reg = <0x0 0x224 0x01000118>;
assigned-address = <0x48>;
};

/* RMI Venice A0 2P */
sbrmi_p1_iod0: sbrmi@0,22401001118 {
reg = <0x0 0x224 0x01001118>;
assigned-address = <0x38>;
};

/* TSI Venice A0 2X1P */
sbtsi_2x1p_p1_iod0: sbtsi@0,22400000118 {
reg = <0x0 0x224 0x00000118>;
assigned-address = <0x48>;
};

/* RMI Venice A0 2X1P */
sbrmi_2x1p_p1_iod0: sbrmi@0,22400001118 {
reg = <0x0 0x224 0x00001118>;
assigned-address = <0x38>;
};

/* TSI Venice AB/B0 2P */
sbtsi_p1_iod0_AB: sbtsi@0,22401000119 {
reg = <0x0 0x224 0x01000119>;
assigned-address = <0x48>;
};

/* RMI Venice AB/B0 2P */
sbrmi_p1_iod0_AB: sbrmi@0,22401001119 {
reg = <0x0 0x224 0x01001119>;
assigned-address = <0x38>;
};

/* TSI Venice AB/B0 2x1P */
sbtsi_2x1p_p1_AB_iod0: sbtsi@0,22400000119 {
reg = <0x0 0x224 0x00000119>;
assigned-address = <0x48>;
};

/* RMI Venice AB/B0 2x1P */
sbrmi_2x1p_p1_AB_iod0: sbrmi@0,22400001119 {
reg = <0x0 0x224 0x00001119>;
assigned-address = <0x38>;
};

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Nigeria does not Support SP8

/* TSI SP8 2P */
sbtsi_p1_sp8: sbtsi@0,2240100011A {
reg = <0x0 0x224 0x0100011A>;
assigned-address = <0x48>;
};

/* RMI SP8 2P */
sbrmi_p1_sp8: sbrmi@0,2240100111A {
reg = <0x0 0x224 0x0100111A>;
assigned-address = <0x38>;
};

/* TSI SP8 2x1P */
sbtsi_2x1p_p1_sp8: sbtsi@0,2240000011A {
reg = <0x0 0x224 0x0000011A>;
assigned-address = <0x48>;
};

/* RMI SP8 2x1P */
sbrmi_2x1p_p1_sp8: sbrmi@0,2240000111A {
reg = <0x0 0x224 0x0000111A>;
assigned-address = <0x38>;
};

scoob_2x1p_p1: scoob@0,22400002118 {
reg = <0x0 0x224 0x00002118>;
mrl = <69>;
Expand Down
48 changes: 3 additions & 45 deletions drivers/misc/amd-apml/apml_sbtsi.c
Original file line number Diff line number Diff line change
Expand Up @@ -422,33 +422,6 @@ static const char *sbtsi_addr_to_label(u8 addr)
}
}

static void map_sbtsi_pid_to_static_addr(struct i3c_device *i3cdev,
struct apml_sbtsi_device *tsi_dev)
{
if ((i3cdev->bus->id == 4) &&
((i3cdev->desc->info.pid == 0x118) ||
(i3cdev->desc->info.pid == 0x22400000119) ||
(i3cdev->desc->info.pid == 0x2240000011A)))
{
tsi_dev->dev_static_addr = 0x4C;
}
else if ((i3cdev->bus->id == 5) &&
((i3cdev->desc->info.pid == 0x118) ||
(i3cdev->desc->info.pid == 0x01000118) ||
(i3cdev->desc->info.pid == 0x22400000119) ||
(i3cdev->desc->info.pid == 0x22401000119) ||
(i3cdev->desc->info.pid == 0x2240000011A) ||
(i3cdev->desc->info.pid == 0x2240100011A)))
{
tsi_dev->dev_static_addr = 0x48;
}
else
{
dev_err(&i3cdev->dev, "unknown pid. pid = 0x%llx\n",
i3cdev->desc->info.pid);
}
}

static int create_misc_tsi_device(struct apml_sbtsi_device *tsi_dev,
struct device *dev)
{
Expand Down Expand Up @@ -510,14 +483,7 @@ static int sbtsi_i3c_probe(struct i3c_device *i3cdev)
mutex_init(&tsi_dev->lock);

/* Need to verify for the static address for i3cdev */
tsi_dev->dev_static_addr = i3cdev->desc->info.static_addr;
map_sbtsi_pid_to_static_addr(i3cdev, tsi_dev);
if (tsi_dev->dev_static_addr == 0)
{
dev_info(dev, "SBTSI: PID = 0x%llx, static address zero, skip the device\n",
i3cdev->desc->info.pid);
return -ENXIO;
}
tsi_dev->dev_static_addr = i3cdev->desc->info.dyn_addr;

hwmon_dev_name = devm_kasprintf(dev, GFP_KERNEL, "sbtsi_%s",
sbtsi_addr_to_label(tsi_dev->dev_static_addr));
Expand Down Expand Up @@ -639,23 +605,15 @@ static void sbtsi_i2c_remove(struct i2c_client *client)
static const struct i3c_device_id sbtsi_i3c_id[] = {
/* (MID, PARTID, EXTIN, DRVDATA) */
I3C_DEVICE_EXTRA_INFO(0, 0x0000, 0x118, NULL), /* P0 - IOD0 - SBTSI */
I3C_DEVICE_EXTRA_INFO(0, 0x0001, 0x118, NULL), /* P0 - IOD1 - SBTST */
I3C_DEVICE_EXTRA_INFO(0, 0x0100, 0x118, NULL), /* P1 - IOD0 - SBTSI */
I3C_DEVICE_EXTRA_INFO(0, 0x0101, 0x118, NULL), /* P1 - IOD1 - SBTSI */
I3C_DEVICE_EXTRA_INFO(0x112, 0, 0x1, NULL),
I3C_DEVICE_EXTRA_INFO(0, 0x0, 0x0, NULL),
I3C_DEVICE_EXTRA_INFO(0x112, 0x0, 0x118, NULL), /* Socket:0, IOD:0 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x1, 0x118, NULL), /* Socket:0, IOD:1 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x100, 0x118, NULL), /* Socket:1 IOD:0 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x101, 0x118, NULL), /* Socket:1 IOD:1 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x0, 0x119, NULL), /* Socket:0, IOD:0 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x1, 0x119, NULL), /* Socket:0, IOD:1 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x100, 0x119, NULL), /* Socket:1 IOD:0 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x101, 0x119, NULL), /* Socket:1 IOD:1 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x0, 0x119, NULL), /* Venice Socket:0, IOD:0 AB/B0 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x100, 0x119, NULL), /* Venice Socket:1 IOD:0 AB/B0 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x0, 0x11A, NULL), /* SP8 Socket:0, IOD:0 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x1, 0x11A, NULL), /* SP8 Socket:0, IOD:1 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x100, 0x11A, NULL), /* SP8 Socket:1 IOD:0 */
I3C_DEVICE_EXTRA_INFO(0x112, 0x101, 0x11A, NULL), /* SP8 Socket:1 IOD:1 */
{}
};
MODULE_DEVICE_TABLE(i3c, sbtsi_i3c_id);
Expand Down
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