From 62934873141bbc9a3391c66f2cd3167bbe2ade77 Mon Sep 17 00:00:00 2001 From: Miles Rusch Date: Wed, 16 Sep 2026 14:16:33 -0700 Subject: [PATCH 1/3] use vlen=256 opu --- saturn-vectors | 2 +- src/Iris.scala | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/saturn-vectors b/saturn-vectors index f716212..4956f75 160000 --- a/saturn-vectors +++ b/saturn-vectors @@ -1 +1 @@ -Subproject commit f7162129179a22e49f1f6b7781d311fbfa563ce6 +Subproject commit 4956f75a04e9740df3edea1857fdc9960501d26a diff --git a/src/Iris.scala b/src/Iris.scala index 73ef937..37c958b 100644 --- a/src/Iris.scala +++ b/src/Iris.scala @@ -456,8 +456,8 @@ class IrisConfig(sim: Boolean = false) // ================================== // new shuttle.common.WithAsynchronousShuttleTiles(3, 3, location=InCluster(0)) ++ // Add async crossings between RocketTile and uncore new saturn.shuttle.WithShuttleVectorUnit( - 512, 256, + 128, VectorParams.opuParams ) ++ new shuttle.common.WithShuttleTileBeatBytes(32) ++ From 78e0b938a1ef8570b014a50808337a34ab10670e Mon Sep 17 00:00:00 2001 From: Miles Rusch Date: Wed, 16 Sep 2026 14:17:18 -0700 Subject: [PATCH 2/3] use vlen=256 opu with mx vec --- src/Iris.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/Iris.scala b/src/Iris.scala index 37c958b..39c4b83 100644 --- a/src/Iris.scala +++ b/src/Iris.scala @@ -458,7 +458,7 @@ class IrisConfig(sim: Boolean = false) new saturn.shuttle.WithShuttleVectorUnit( 256, 128, - VectorParams.opuParams + VectorParams.opuMxParams ) ++ new shuttle.common.WithShuttleTileBeatBytes(32) ++ new shuttle.common.WithTCM(size = 128L << 10, banks = 2) ++ From 796811954ac70ae4439eda1436c052afa3c14065 Mon Sep 17 00:00:00 2001 From: Rohan Kumar Date: Thu, 24 Sep 2026 14:46:02 -0700 Subject: [PATCH 3/3] Remove second ShuttleTile with OPU --- src/Iris.scala | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/src/Iris.scala b/src/Iris.scala index 73ef937..9c4a7ec 100644 --- a/src/Iris.scala +++ b/src/Iris.scala @@ -420,15 +420,13 @@ class IrisConfig(sim: Boolean = false) IrisNoCParams( constellation.protocol.DiplomaticNetworkNodeMapping( inNodeMapping = ListMap( - "Core 0 ICache" -> 0, // Shuttle 0 (left) - "Core 1 ICache" -> 2, // Shuttle 1 (right) + "Core 0 ICache" -> 0, // Shuttle (left) "debug[0]" -> 6, // Front BUS - "Core 2 DCache" -> 4, // RocketTile + "Core 1 DCache" -> 4, // RocketTile "ucie-client" -> 5 ), outNodeMapping = ListMap( - "Core 0 TCM" -> 0, // Shuttle 0 TCM (left) - "Core 1 TCM" -> 2, // Shuttle 1 TCM (right) + "Core 0 TCM" -> 0, // Shuttle TCM (left) "ctrls[0]" -> 6, // PBUS "serdesser[2]|" -> 3, // L2 (top) "serdesser[3]|" -> 3, // L2 (top) @@ -471,7 +469,18 @@ class IrisConfig(sim: Boolean = false) // new shuttle.common.WithL1DCacheSets(256) ++ new shuttle.common.WithL1DCacheBanks(1) ++ new shuttle.common.WithL1DCacheTagBanks(1) ++ - new shuttle.common.WithNShuttleCores(2) ++ + // ONE Shuttle tile. Two of them do not fit: each carries an 8x8 + // OuterProductUnit (dLen 256 -> 64 OuterProductClusters), and the + // cluster alone measures ~15.7k um^2 of cells, so one OPU array is + // ~1.6mm^2 of die against a 6.1mm^2 core that also has to hold two + // 1mm^2 UcieTL links, the L2, Rocket, the scratchpads and the uncore. + // See `iris_hierarchy` in vlsi/src/lib.rs for the area budget the + // floorplan is built to. + // + // Node 2 of the SBUS NoC torus, which the second tile used, is left + // unmapped above; the tile ids shift with the tile count, so Rocket is + // "Core 1" here where two Shuttle tiles made it "Core 2". + new shuttle.common.WithNShuttleCores(1) ++ // Chiplet Router with two D2D SerialTL ports and two D2D UCIe ports new testchipip.soc.WithChipletRouting(testchipip.soc.ChipletRoutingParams(