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| 1 | +/* |
| 2 | + ******************************************************************************* |
| 3 | + * Copyright (c) 2026, STMicroelectronics |
| 4 | + * All rights reserved. |
| 5 | + * |
| 6 | + * This software component is licensed by ST under BSD 3-Clause license, |
| 7 | + * the "License"; You may not use this file except in compliance with the |
| 8 | + * License. You may obtain a copy of the License at: |
| 9 | + * opensource.org/licenses/BSD-3-Clause |
| 10 | + * |
| 11 | + ******************************************************************************* |
| 12 | + */ |
| 13 | +#if defined(ARDUINO_WEACT_WB55CGU6) |
| 14 | +#include "pins_arduino.h" |
| 15 | +#include "lock_resource.h" |
| 16 | + |
| 17 | +// Digital PinName array |
| 18 | +const PinName digitalPin[] = { |
| 19 | + PB_2, // D0 |
| 20 | + PA_9, // D1 |
| 21 | + PA_8, // D2 |
| 22 | + PA_7, // D3 |
| 23 | + PA_6, // D4 |
| 24 | + PA_5, // D5 |
| 25 | + PA_4, // D6 |
| 26 | + PA_3, // D7 |
| 27 | + PA_2, // D8 |
| 28 | + PA_1, // D9 |
| 29 | + PA_0, // D10 |
| 30 | + PB_8, // D11 |
| 31 | + PB_9, // D12 |
| 32 | + PH_3, // D13 - BOOT0 / SW2 button |
| 33 | + PB_0, // D14 |
| 34 | + PB_1, // D15 |
| 35 | + PE_4, // D16 - onboard blue LED |
| 36 | + PA_10, // D17 |
| 37 | + PA_15, // D18 |
| 38 | + PB_3, // D19 |
| 39 | + PB_4, // D20 |
| 40 | + PB_5, // D21 |
| 41 | + PB_6, // D22 |
| 42 | + PB_7 // D23 |
| 43 | +}; |
| 44 | + |
| 45 | +// Analog (Ax) pin number array |
| 46 | +const pin_size_t analogInputPin[] = { |
| 47 | + 10, // A0, PA0 |
| 48 | + 9, // A1, PA1 |
| 49 | + 8, // A2, PA2 |
| 50 | + 7, // A3, PA3 |
| 51 | + 6, // A4, PA4 |
| 52 | + 5, // A5, PA5 |
| 53 | + 4, // A6, PA6 |
| 54 | + 3, // A7, PA7 |
| 55 | + 2, // A8, PA8 |
| 56 | + 1 // A9, PA9 |
| 57 | +}; |
| 58 | + |
| 59 | +// ---------------------------------------------------------------------------- |
| 60 | +#ifdef __cplusplus |
| 61 | +extern "C" { |
| 62 | +#endif |
| 63 | + |
| 64 | +/** |
| 65 | + * @brief System Clock Configuration |
| 66 | + * @param None |
| 67 | + * @retval None |
| 68 | + * |
| 69 | + * Board is fitted with a 32MHz HSE crystal (X2) and a 32.768kHz LSE |
| 70 | + * crystal (X1). SYSCLK is driven directly by HSE (no PLL needed) and |
| 71 | + * USB/RNG are clocked from the dedicated HSI48 oscillator, otherwise |
| 72 | + * the USB peripheral is left unclocked and never enumerates. |
| 73 | + */ |
| 74 | +WEAK void SystemClock_Config(void) |
| 75 | +{ |
| 76 | + RCC_OscInitTypeDef RCC_OscInitStruct = {}; |
| 77 | + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; |
| 78 | + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {}; |
| 79 | + |
| 80 | + /* This prevents concurrent access to RCC registers by CPU2 (M0+) */ |
| 81 | + hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY); |
| 82 | + |
| 83 | + /* Macro to configure the PLL multiplication factor */ |
| 84 | + __HAL_RCC_PLL_PLLM_CONFIG(RCC_PLLM_DIV2); |
| 85 | + |
| 86 | + /* Macro to configure the PLL clock source */ |
| 87 | + __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE); |
| 88 | + |
| 89 | + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMHIGH); |
| 90 | + /* Configure the main internal regulator output voltage */ |
| 91 | + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
| 92 | + |
| 93 | + /* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */ |
| 94 | + hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY); |
| 95 | + |
| 96 | + /* Initializes the CPU, AHB and APB busses clocks */ |
| 97 | + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI |
| 98 | + | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE; |
| 99 | + RCC_OscInitStruct.HSEState = RCC_HSE_ON; |
| 100 | + RCC_OscInitStruct.LSEState = RCC_LSE_ON; |
| 101 | + RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
| 102 | + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; |
| 103 | + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; |
| 104 | + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; |
| 105 | + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
| 106 | + Error_Handler(); |
| 107 | + } |
| 108 | + |
| 109 | + /* Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers */ |
| 110 | + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 |
| 111 | + | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
| 112 | + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
| 113 | + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; |
| 114 | + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
| 115 | + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; |
| 116 | + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; |
| 117 | + RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1; |
| 118 | + RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1; |
| 119 | + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { |
| 120 | + Error_Handler(); |
| 121 | + } |
| 122 | + |
| 123 | + /* Initializes the peripherals clocks */ |
| 124 | + /* RNG needs to be configured like in M0 core, i.e. with HSI48 */ |
| 125 | + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP |
| 126 | + | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB; |
| 127 | + PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE; |
| 128 | + PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48; |
| 129 | + PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE; |
| 130 | + PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0; |
| 131 | + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; |
| 132 | + |
| 133 | + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { |
| 134 | + Error_Handler(); |
| 135 | + } |
| 136 | + |
| 137 | + LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA); |
| 138 | + LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40); |
| 139 | + LL_PWR_SMPS_Enable(); |
| 140 | + |
| 141 | + /* Select HSI as system clock source after Wake Up from Stop mode */ |
| 142 | + LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI); |
| 143 | + |
| 144 | + hsem_unlock(CFG_HW_RCC_SEMID); |
| 145 | +} |
| 146 | + |
| 147 | +#ifdef __cplusplus |
| 148 | +} |
| 149 | +#endif |
| 150 | +#endif /* ARDUINO_WEACT_WB55CGU6 */ |
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