diff --git a/Bender.yml b/Bender.yml index d7be422..ce31ac3 100644 --- a/Bender.yml +++ b/Bender.yml @@ -8,7 +8,7 @@ package: - "Michael Rogenmoser " dependencies: - common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.38.0 } + common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 2.0.0-beta } common_verification: { git: "https://github.com/pulp-platform/common_verification.git", version: 0.2.3 } export_include_dirs: diff --git a/include/obi/typedef.svh b/include/obi/typedef.svh index 9bbe65a..c15f375 100644 --- a/include/obi/typedef.svh +++ b/include/obi/typedef.svh @@ -7,14 +7,16 @@ `ifndef OBI_TYPEDEF_SVH `define OBI_TYPEDEF_SVH +`define OBI_TYPEDEF_MIN_WIDTH(WIDTH) ((WIDTH) > 0 ? (WIDTH) : 1) + `define OBI_TYPEDEF_A_CHAN_T(a_chan_t, ADDR_WIDTH, DATA_WIDTH, ID_WIDTH, a_optional_t) \ typedef struct packed { \ - logic [ ADDR_WIDTH-1:0] addr; \ - logic we; \ - logic [DATA_WIDTH/8-1:0] be; \ - logic [ DATA_WIDTH-1:0] wdata; \ - logic [ ID_WIDTH-1:0] aid; \ - a_optional_t a_optional; \ + logic [ ADDR_WIDTH-1:0] addr; \ + logic we; \ + logic [ DATA_WIDTH/8-1:0] be; \ + logic [ DATA_WIDTH-1:0] wdata; \ + logic [`OBI_TYPEDEF_MIN_WIDTH(ID_WIDTH)-1:0] aid; \ + a_optional_t a_optional; \ } a_chan_t; `define OBI_TYPEDEF_TYPE_A_CHAN_T(a_chan_t, addr_t, data_t, strb_t, id_t, a_optional_t) \ @@ -37,22 +39,22 @@ `define OBI_TYPEDEF_ALL_A_OPTIONAL(a_optional_t, AUSER_WIDTH, WUSER_WIDTH, MID_WIDTH, ACHK_WIDTH) \ typedef struct packed { \ - logic [ AUSER_WIDTH-1:0] auser; \ - logic [ WUSER_WIDTH-1:0] wuser; \ - obi_pkg::atop_t atop; \ - obi_pkg::memtype_t memtype; \ - logic [ MID_WIDTH-1:0] mid; \ - obi_pkg::prot_t prot; \ - logic dbg; \ - logic [ ACHK_WIDTH-1:0] achk; \ + logic [`OBI_TYPEDEF_MIN_WIDTH(AUSER_WIDTH)-1:0] auser; \ + logic [`OBI_TYPEDEF_MIN_WIDTH(WUSER_WIDTH)-1:0] wuser; \ + obi_pkg::atop_t atop; \ + obi_pkg::memtype_t memtype; \ + logic [ `OBI_TYPEDEF_MIN_WIDTH(MID_WIDTH)-1:0] mid; \ + obi_pkg::prot_t prot; \ + logic dbg; \ + logic [ `OBI_TYPEDEF_MIN_WIDTH(ACHK_WIDTH)-1:0] achk; \ } a_optional_t; `define OBI_TYPEDEF_R_CHAN_T(r_chan_t, RDATA_WIDTH, ID_WIDTH, r_optional_t) \ typedef struct packed { \ - logic [RDATA_WIDTH-1:0] rdata; \ - logic [ ID_WIDTH-1:0] rid; \ - logic err; \ - r_optional_t r_optional; \ + logic [ RDATA_WIDTH-1:0] rdata; \ + logic [`OBI_TYPEDEF_MIN_WIDTH(ID_WIDTH)-1:0] rid; \ + logic err; \ + r_optional_t r_optional; \ } r_chan_t; `define OBI_TYPEDEF_TYPE_R_CHAN_T(r_chan_t, data_t, id_t, r_optional_t) \ @@ -68,9 +70,9 @@ `define OBI_TYPEDEF_ALL_R_OPTIONAL(r_optional_t, RUSER_WIDTH, RCHK_WIDTH) \ typedef struct packed { \ - logic [RUSER_WIDTH-1:0] ruser; \ - logic exokay; \ - logic [ RCHK_WIDTH-1:0] rchk; \ + logic [`OBI_TYPEDEF_MIN_WIDTH(RUSER_WIDTH)-1:0] ruser; \ + logic exokay; \ + logic [ `OBI_TYPEDEF_MIN_WIDTH(RCHK_WIDTH)-1:0] rchk; \ } r_optional_t; `define OBI_TYPEDEF_DEFAULT_REQ_T(req_t, a_chan_t) \ diff --git a/src/obi_atop_resolver.sv b/src/obi_atop_resolver.sv index 357eb46..ec76fa6 100644 --- a/src/obi_atop_resolver.sv +++ b/src/obi_atop_resolver.sv @@ -40,7 +40,6 @@ module obi_atop_resolver ) ( input logic clk_i, input logic rst_ni, - input logic testmode_i, input sbr_port_obi_req_t sbr_port_req_i, output sbr_port_obi_rsp_t sbr_port_rsp_o, @@ -93,9 +92,9 @@ module obi_atop_resolver logic [$clog2(SbrPortObiCfg.DataWidth/8)-1:0] lz_cnt; assign amo_operand_addr = lz_cnt >> $clog2(RiscvWordWidth / 8); - lzc #( - .WIDTH(SbrPortObiCfg.DataWidth / 8), - .MODE (1'b0) + cc_lzc #( + .Width (SbrPortObiCfg.DataWidth / 8), + .Mode (cc_pkg::LZC_TRAILING_ZERO_CNT) ) i_count_addr ( .in_i (be_q), .cnt_o (lz_cnt), @@ -103,15 +102,15 @@ module obi_atop_resolver ); // Store the metadata at handshake - stream_fifo #( - .T (logic [SbrPortObiCfg.IdWidth-1:0]), - .DEPTH (NumTxns), - .FALL_THROUGH (1'b0) + cc_stream_fifo #( + .data_t (logic [SbrPortObiCfg.IdWidth-1:0]), + .Depth (NumTxns), + .FallThrough (1'b0) ) i_metadata_register ( .clk_i, .rst_ni, + .clr_i ('0), .flush_i ('0), - .testmode_i ('0), .usage_o (), .valid_i (sbr_port_req_i.req && sbr_port_rsp_o.gnt), .ready_o(meta_ready), @@ -160,14 +159,14 @@ module obi_atop_resolver end end - fifo_v3 #( - .FALL_THROUGH(1'b1), - .dtype (out_buffer_t), - .DEPTH (2) + cc_fifo #( + .FallThrough (1'b1), + .data_t (out_buffer_t), + .Depth (2) ) i_rdata_fifo ( .clk_i, .rst_ni, - .testmode_i, + .clr_i ('0), .flush_i(1'b0), .full_o (rdata_full), .empty_o(rdata_empty), @@ -331,11 +330,11 @@ module obi_atop_resolver end end - if (!MgrPortObiCfg.OptionalCfg.AUserWidth && - !MgrPortObiCfg.OptionalCfg.WUserWidth && + if (MgrPortObiCfg.OptionalCfg.AUserWidth == 0 && + MgrPortObiCfg.OptionalCfg.WUserWidth == 0 && !MgrPortObiCfg.OptionalCfg.UseProt && !MgrPortObiCfg.OptionalCfg.UseMemtype && - !MgrPortObiCfg.OptionalCfg.MidWidth && + MgrPortObiCfg.OptionalCfg.MidWidth == 0 && !MgrPortObiCfg.OptionalCfg.UseDbg) begin : gen_no_optional assign a_optional = '0; end @@ -547,7 +546,6 @@ module obi_atop_resolver_intf ) ( input logic clk_i, input logic rst_ni, - input logic testmode_i, OBI_BUS.Subordinate sbr_port, @@ -583,7 +581,6 @@ module obi_atop_resolver_intf ) i_obi_atop_resolver ( .clk_i, .rst_ni, - .testmode_i, .sbr_port_req_i(sbr_port_req), .sbr_port_rsp_o(sbr_port_rsp), .mgr_port_req_o(mgr_port_req), diff --git a/src/obi_cut.sv b/src/obi_cut.sv index b5f42d5..52e2f73 100644 --- a/src/obi_cut.sv +++ b/src/obi_cut.sv @@ -32,12 +32,13 @@ module obi_cut #( input obi_rsp_t mgr_port_rsp_i ); - spill_register #( - .T ( obi_a_chan_t ), + cc_spill_register #( + .data_t ( obi_a_chan_t ), .Bypass ( BypassReq ) ) i_reg_a ( .clk_i, .rst_ni, + .clr_i ( '0 ), .valid_i ( sbr_port_req_i.req ), .ready_o ( sbr_port_rsp_o.gnt ), .data_i ( sbr_port_req_i.a ), @@ -56,12 +57,13 @@ module obi_cut #( assign ready_i = 1'b1; end - spill_register #( - .T ( obi_r_chan_t ), + cc_spill_register #( + .data_t ( obi_r_chan_t ), .Bypass ( BypassRsp ) ) i_req_r ( .clk_i, .rst_ni, + .clr_i ( '0 ), .valid_i ( mgr_port_rsp_i.rvalid ), .ready_o ( ready_o ), .data_i ( mgr_port_rsp_i.r ), diff --git a/src/obi_demux.sv b/src/obi_demux.sv index 3eb016e..6b97820 100644 --- a/src/obi_demux.sv +++ b/src/obi_demux.sv @@ -16,7 +16,7 @@ module obi_demux #( /// The maximum number of outstanding transactions. parameter int unsigned NumMaxTrans = 32'd0, /// The type of the port select signal. - parameter type select_t = logic [cf_math_pkg::idx_width(NumMgrPorts)-1:0] + parameter type select_t = logic [cc_pkg::idx_width(NumMgrPorts)-1:0] ) ( input logic clk_i, input logic rst_ni, @@ -34,7 +34,7 @@ module obi_demux #( end // stall requests to ensure in-order behavior (could be handled differently with rready) - localparam int unsigned CounterWidth = cf_math_pkg::idx_width(NumMaxTrans); + localparam int unsigned CounterWidth = cc_pkg::idx_width(NumMaxTrans); logic cnt_up, cnt_down, overflow; logic [CounterWidth-1:0] in_flight; @@ -81,14 +81,14 @@ module obi_demux #( assign cnt_down = mgr_ports_rsp_i[select_q].rvalid && sbr_port_rready; - delta_counter #( - .WIDTH ( CounterWidth ), - .STICKY_OVERFLOW ( 1'b0 ) + cc_delta_counter #( + .Width ( CounterWidth ), + .StickyOverflow ( 1'b0 ) ) i_counter ( .clk_i, .rst_ni, - .clear_i ( 1'b0 ), + .clr_i ( 1'b0 ), .en_i ( cnt_up ^ cnt_down ), .load_i ( 1'b0 ), .down_i ( cnt_down ), @@ -119,7 +119,7 @@ module obi_demux_intf #( /// The maximum number of outstanding transactions. parameter int unsigned NumMaxTrans = 32'd0, /// The type of the port select signal. - parameter type select_t = logic [cf_math_pkg::idx_width(NumMgrPorts)-1:0] + parameter type select_t = logic [cc_pkg::idx_width(NumMgrPorts)-1:0] ) ( input logic clk_i, input logic rst_ni, diff --git a/src/obi_err_sbr.sv b/src/obi_err_sbr.sv index e116ca7..c1fb69d 100644 --- a/src/obi_err_sbr.sv +++ b/src/obi_err_sbr.sv @@ -18,7 +18,6 @@ module obi_err_sbr #( ) ( input logic clk_i, input logic rst_ni, - input logic testmode_i, input obi_req_t obi_req_i, output obi_rsp_t obi_rsp_o @@ -43,14 +42,14 @@ module obi_err_sbr #( assign fifo_pop = obi_rsp_o.rvalid; end - fifo_v3 #( - .DEPTH ( ObiCfg.UseRReady ? NumMaxTrans : 1 ), - .FALL_THROUGH ( 1'b0 ), - .DATA_WIDTH ( ObiCfg.IdWidth ) + cc_fifo #( + .Depth ( ObiCfg.UseRReady ? NumMaxTrans : 1 ), + .FallThrough ( 1'b0 ), + .DataWidth ( ObiCfg.IdWidth ) ) i_id_fifo ( .clk_i, .rst_ni, - .testmode_i, + .clr_i ( '0 ), .flush_i ( '0 ), .full_o ( fifo_full ), .empty_o ( fifo_empty ), @@ -76,7 +75,6 @@ module obi_err_sbr_intf #( ) ( input logic clk_i, input logic rst_ni, - input logic testmode_i, OBI_BUS.Subordinate sbr_port ); @@ -98,7 +96,6 @@ module obi_err_sbr_intf #( ) i_err_sbr ( .clk_i, .rst_ni, - .testmode_i, .obi_req_i ( obi_req ), .obi_rsp_o ( obi_rsp ) diff --git a/src/obi_mux.sv b/src/obi_mux.sv index 5e17b5c..592a40b 100644 --- a/src/obi_mux.sv +++ b/src/obi_mux.sv @@ -33,7 +33,6 @@ module obi_mux #( ) ( input logic clk_i, input logic rst_ni, - input logic testmode_i, input sbr_port_obi_req_t [NumSbrPorts-1:0] sbr_ports_req_i, output sbr_port_obi_rsp_t [NumSbrPorts-1:0] sbr_ports_rsp_o, @@ -45,7 +44,7 @@ module obi_mux #( $fatal(1, "unimplemented"); end - localparam int unsigned RequiredExtraIdWidth = cf_math_pkg::idx_width(NumSbrPorts); + localparam int unsigned RequiredExtraIdWidth = cc_pkg::idx_width(NumSbrPorts); logic [NumSbrPorts-1:0] sbr_ports_req, sbr_ports_gnt; sbr_port_a_chan_t [NumSbrPorts-1:0] sbr_ports_a; @@ -59,16 +58,16 @@ module obi_mux #( logic [RequiredExtraIdWidth-1:0] selected_id, response_id; logic mgr_port_req, fifo_full, fifo_pop; - rr_arb_tree #( + cc_rr_arb_tree #( .NumIn ( NumSbrPorts ), - .DataType ( sbr_port_a_chan_t ), + .data_t ( sbr_port_a_chan_t ), .AxiVldRdy ( 1'b1 ), .LockIn ( 1'b1 ) ) i_rr_arb ( .clk_i, .rst_ni, + .clr_i ( '0 ), - .flush_i ( 1'b0 ), .rr_i ( '0 ), .req_i ( sbr_ports_req ), @@ -112,15 +111,15 @@ module obi_mux #( end else begin : gen_no_id_assign - fifo_v3 #( - .FALL_THROUGH( 1'b0 ), - .DATA_WIDTH ( RequiredExtraIdWidth ), - .DEPTH ( NumMaxTrans ) + cc_fifo #( + .FallThrough ( 1'b0 ), + .DataWidth ( RequiredExtraIdWidth ), + .Depth ( NumMaxTrans ) ) i_fifo ( .clk_i, .rst_ni, + .clr_i ('0), .flush_i ('0), - .testmode_i, .full_o ( fifo_full ), .empty_o (), @@ -177,7 +176,6 @@ module obi_mux_intf #( ) ( input logic clk_i, input logic rst_ni, - input logic testmode_i, OBI_BUS.Subordinate sbr_ports [NumSbrPorts], @@ -216,7 +214,6 @@ module obi_mux_intf #( ) i_obi_mux ( .clk_i, .rst_ni, - .testmode_i, .sbr_ports_req_i ( sbr_ports_req ), .sbr_ports_rsp_o ( sbr_ports_rsp ), diff --git a/src/obi_pkg.sv b/src/obi_pkg.sv index 32bb1d1..8d4cd47 100644 --- a/src/obi_pkg.sv +++ b/src/obi_pkg.sv @@ -111,7 +111,7 @@ package obi_pkg; CombGnt: ObiCfgIn.CombGnt, AddrWidth: ObiCfgIn.AddrWidth, DataWidth: ObiCfgIn.DataWidth, - IdWidth: ObiCfgIn.IdWidth + cf_math_pkg::idx_width(NumManagers), + IdWidth: ObiCfgIn.IdWidth + cc_pkg::idx_width(NumManagers), Integrity: ObiCfgIn.Integrity, BeFull: ObiCfgIn.BeFull, OptionalCfg: ObiCfgIn.OptionalCfg diff --git a/src/obi_rready_converter.sv b/src/obi_rready_converter.sv index 518d923..7ae6dbb 100644 --- a/src/obi_rready_converter.sv +++ b/src/obi_rready_converter.sv @@ -12,7 +12,6 @@ module obi_rready_converter #( ) ( input logic clk_i, input logic rst_ni, - input logic test_mode_i, input obi_a_chan_t sbr_a_chan_i, input logic req_i, @@ -29,15 +28,15 @@ module obi_rready_converter #( ); logic fifo_ready, credit_left; - stream_fifo #( - .FALL_THROUGH ( 1'b1 ), - .DEPTH ( Depth ), - .T ( obi_r_chan_t ) + cc_stream_fifo #( + .FallThrough ( 1'b1 ), + .Depth ( Depth ), + .data_t ( obi_r_chan_t ) ) response_fifo_i ( .clk_i, .rst_ni, + .clr_i ( '0 ), .flush_i ( 1'b0 ), - .testmode_i ( test_mode_i ), .usage_o (), .data_i ( mgr_r_chan_i ), .valid_i ( rvalid_i ), diff --git a/src/obi_xbar.sv b/src/obi_xbar.sv index 2f1b3ce..d43e79e 100644 --- a/src/obi_xbar.sv +++ b/src/obi_xbar.sv @@ -39,7 +39,6 @@ module obi_xbar #( ) ( input logic clk_i, input logic rst_ni, - input logic testmode_i, input sbr_port_obi_req_t [NumSbrPorts-1:0] sbr_ports_req_i, output sbr_port_obi_rsp_t [NumSbrPorts-1:0] sbr_ports_rsp_o, @@ -49,10 +48,10 @@ module obi_xbar #( input addr_map_rule_t [NumAddrRules-1:0] addr_map_i, input logic [NumSbrPorts-1:0] en_default_idx_i, - input logic [NumSbrPorts-1:0][cf_math_pkg::idx_width(NumMgrPorts)-1:0] default_idx_i + input logic [NumSbrPorts-1:0][cc_pkg::idx_width(NumMgrPorts)-1:0] default_idx_i ); - logic [NumSbrPorts-1:0][cf_math_pkg::idx_width(NumMgrPorts)-1:0] sbr_port_select; + logic [NumSbrPorts-1:0][cc_pkg::idx_width(NumMgrPorts)-1:0] sbr_port_select; // Signals from the demuxes sbr_port_obi_req_t [NumSbrPorts-1:0][NumMgrPorts-1:0] sbr_reqs; @@ -63,7 +62,7 @@ module obi_xbar #( sbr_port_obi_rsp_t [NumMgrPorts-1:0][NumSbrPorts-1:0] mgr_rsps; for (genvar i = 0; i < NumSbrPorts; i++) begin : gen_demux - addr_decode #( + cc_addr_decode #( .NoIndices ( NumMgrPorts ), .NoRules ( NumAddrRules ), .addr_t ( logic [MgrPortObiCfg.AddrWidth-1:0] ), @@ -121,7 +120,6 @@ module obi_xbar #( ) i_err_sbr ( .clk_i, .rst_ni, - .testmode_i, .obi_req_i (sbr_reqs[i][j]), .obi_rsp_o (sbr_rsps[i][j]) ); @@ -145,7 +143,6 @@ module obi_xbar #( ) i_mux ( .clk_i, .rst_ni, - .testmode_i, .sbr_ports_req_i ( mgr_reqs[i] ), .sbr_ports_rsp_o ( mgr_rsps[i] ), .mgr_port_req_o ( mgr_ports_req_o[i] ), @@ -180,7 +177,6 @@ module obi_xbar_intf #( ) ( input logic clk_i, input logic rst_ni, - input logic testmode_i, OBI_BUS.Subordinate sbr_ports [NumSbrPorts], @@ -188,7 +184,7 @@ module obi_xbar_intf #( input addr_map_rule_t [NumAddrRules-1:0] addr_map_i, input logic [NumSbrPorts-1:0] en_default_idx_i, - input logic [NumSbrPorts-1:0][cf_math_pkg::idx_width(NumMgrPorts)-1:0] default_idx_i + input logic [NumSbrPorts-1:0][cc_pkg::idx_width(NumMgrPorts)-1:0] default_idx_i ); `OBI_TYPEDEF_ALL(sbr_port_obi, SbrPortObiCfg) @@ -229,7 +225,6 @@ module obi_xbar_intf #( ) i_obi_xbar ( .clk_i, .rst_ni, - .testmode_i, .sbr_ports_req_i ( sbr_ports_req ), .sbr_ports_rsp_o ( sbr_ports_rsp ), .mgr_ports_req_o ( mgr_ports_req ), diff --git a/src/test/tb_obi_atop_resolver.sv b/src/test/tb_obi_atop_resolver.sv index 0e4b33d..aeefd6f 100644 --- a/src/test/tb_obi_atop_resolver.sv +++ b/src/test/tb_obi_atop_resolver.sv @@ -18,7 +18,7 @@ module tb_obi_atop_resolver; localparam int unsigned AddrWidth = 32; localparam int unsigned DataWidth = 32; localparam int unsigned MgrIdWidth = 5; - localparam int unsigned SbrIdWidth = MgrIdWidth+cf_math_pkg::idx_width(NumManagers); + localparam int unsigned SbrIdWidth = MgrIdWidth+cc_pkg::idx_width(NumManagers); localparam int unsigned AUserWidth = 4; localparam int unsigned WUserWidth = 2; localparam int unsigned RUserWidth = 3; @@ -176,7 +176,6 @@ module tb_obi_atop_resolver; ) i_obi_mux ( .clk_i ( clk ), .rst_ni ( rst_n ), - .testmode_i ( 1'b0 ), .sbr_ports ( mgr_bus ), .mgr_port ( mgr_bus_muxed ) ); @@ -189,7 +188,6 @@ module tb_obi_atop_resolver; ) i_atop_resolver ( .clk_i ( clk ), .rst_ni ( rst_n ), - .testmode_i ( '0 ), .sbr_port ( mgr_bus_muxed ), .mgr_port ( sbr_bus ) ); @@ -218,7 +216,7 @@ module tb_obi_atop_resolver; .ObiIdWidthM ( MgrIdWidth ), .ObiIdWidthS ( SbrIdWidth ), .ObiUserWidth ( AUserWidth ), - .NumMgrWidth ( cf_math_pkg::idx_width(NumManagers) ), + .NumMgrWidth ( cc_pkg::idx_width(NumManagers) ), .ApplDelay ( ApplTime ), .AcqDelay ( TestTime ) ) golden_memory = new(mem_monitor_dv); @@ -493,7 +491,7 @@ module tb_obi_atop_resolver; // SC without acquiring lock -> !exokay /////////////////////////////////////// assert (randomize(address)); - address[cf_math_pkg::idx_width(DataWidth/8)-1:0] = '0; + address[cc_pkg::idx_width(DataWidth/8)-1:0] = '0; assert (randomize(data)); assert (randomize(trans_id)); // Initialize address @@ -519,7 +517,7 @@ module tb_obi_atop_resolver; // LR/SC sequence -> exokay /////////////////////////// assert (randomize(address)); - address[cf_math_pkg::idx_width(DataWidth/8)-1:0] = '0; + address[cc_pkg::idx_width(DataWidth/8)-1:0] = '0; assert (randomize(trans_id)); // Initialize address obi_rand_managers[0].write(address, '1, '0, trans_id, a_optional, rdata, rid, err, r_optional); @@ -553,7 +551,7 @@ module tb_obi_atop_resolver; // LR then different SC -> !exokay ////////////////////////////////// assert (randomize(address)); - address[cf_math_pkg::idx_width(DataWidth/8)-1:0] = '0; + address[cc_pkg::idx_width(DataWidth/8)-1:0] = '0; assert (randomize(trans_id)); // Initialize address obi_rand_managers[0].write(address, '1, '0, trans_id, a_optional, rdata, rid, err, r_optional); @@ -568,7 +566,7 @@ module tb_obi_atop_resolver; do begin assert (randomize(address_2)); - address_2[cf_math_pkg::idx_width(DataWidth/8)-1:0] = '0; + address_2[cc_pkg::idx_width(DataWidth/8)-1:0] = '0; end while (address_2 == address); assert (randomize(data)); a_optional.atop = ATOPSC; @@ -583,7 +581,7 @@ module tb_obi_atop_resolver; // LR, other core store, SC -> !exokay ////////////////////////////////////// assert (randomize(address)); - address[cf_math_pkg::idx_width(DataWidth/8)-1:0] = '0; + address[cc_pkg::idx_width(DataWidth/8)-1:0] = '0; assert (randomize(trans_id)); // Initialize address obi_rand_managers[0].write(address, '1, '0, trans_id, a_optional, rdata, rid, err, r_optional); diff --git a/src/test/tb_obi_xbar.sv b/src/test/tb_obi_xbar.sv index 9586050..a04a485 100644 --- a/src/test/tb_obi_xbar.sv +++ b/src/test/tb_obi_xbar.sv @@ -17,7 +17,7 @@ module tb_obi_xbar; localparam int unsigned AddrWidth = 32; localparam int unsigned DataWidth = 32; localparam int unsigned MgrIdWidth = 5; - localparam int unsigned SbrIdWidth = MgrIdWidth+cf_math_pkg::idx_width(NumManagers); + localparam int unsigned SbrIdWidth = MgrIdWidth+cc_pkg::idx_width(NumManagers); localparam int unsigned AUserWidth = 4; localparam int unsigned WUserWidth = 2; localparam int unsigned RUserWidth = 3; @@ -211,7 +211,6 @@ module tb_obi_xbar; ) i_dut ( .clk_i ( clk ), .rst_ni ( rst_n ), - .testmode_i ( 1'b0 ), .sbr_ports ( mgr_bus ), .mgr_ports ( sbr_bus ), .addr_map_i ( AddrMap ),