@@ -2685,6 +2685,7 @@ IR_FOLD(DIV(NEG, C_FLOAT))
26852685{
26862686 op1 = op1_insn -> op1 ;
26872687 val .f = - op2_insn -> val .f ;
2688+ val .u32_hi = 0 ;
26882689 op2 = ir_const (ctx , val , op2_insn -> type );
26892690 IR_FOLD_RESTART ;
26902691}
@@ -3695,7 +3696,8 @@ IR_FOLD(ADD(ADD, C_ADDR))
36953696{
36963697 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
36973698 /* (x + c1) + c2 => x + (c1 + c2) */
3698- val .u64 = ctx -> ir_base [op1_insn -> op2 ].val .u64 + op2_insn -> val .u64 ;
3699+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3700+ ctx -> ir_base [op1_insn -> op2 ].val .u64 + op2_insn -> val .u64 );
36993701 op1 = op1_insn -> op1 ;
37003702 op2 = ir_const (ctx , val , op2_insn -> type );
37013703 IR_FOLD_RESTART ;
@@ -3710,7 +3712,8 @@ IR_FOLD(ADD(ADD, C_I64))
37103712{
37113713 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
37123714 /* (x + c1) + c2 => x + (c1 + c2) */
3713- val .i64 = ctx -> ir_base [op1_insn -> op2 ].val .u64 + op2_insn -> val .u64 ;
3715+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3716+ ctx -> ir_base [op1_insn -> op2 ].val .u64 + op2_insn -> val .u64 );
37143717 op1 = op1_insn -> op1 ;
37153718 op2 = ir_const (ctx , val , op2_insn -> type );
37163719 IR_FOLD_RESTART ;
@@ -3726,13 +3729,15 @@ IR_FOLD(ADD(SUB, C_ADDR))
37263729{
37273730 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
37283731 /* (x - c1) + c2 => x + (c2 - c1) */
3729- val .u64 = op2_insn -> val .u64 - ctx -> ir_base [op1_insn -> op2 ].val .u64 ;
3732+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3733+ op2_insn -> val .u64 - ctx -> ir_base [op1_insn -> op2 ].val .u64 );
37303734 op1 = op1_insn -> op1 ;
37313735 op2 = ir_const (ctx , val , op2_insn -> type );
37323736 IR_FOLD_RESTART ;
37333737 } else if (IR_IS_CONST_REF (op1_insn -> op1 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op1 ].op )) {
37343738 /* (c1 - x) + c2 => (c1 + c2) - x */
3735- val .u64 = ctx -> ir_base [op1_insn -> op1 ].val .u64 + op2_insn -> val .u64 ;
3739+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3740+ ctx -> ir_base [op1_insn -> op1 ].val .u64 + op2_insn -> val .u64 );
37363741 opt ++ ; /* ADD -> SUB */
37373742 op2 = op1_insn -> op2 ;
37383743 op1 = ir_const (ctx , val , op2_insn -> type );
@@ -3748,8 +3753,9 @@ IR_FOLD(ADD(SUB, C_I64))
37483753{
37493754 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
37503755 /* (x - c1) + c2 => x + (c2 - c1) */
3751- val .i64 = op2_insn -> val .u64 - ctx -> ir_base [op1_insn -> op2 ].val .u64 ;
3752- if (val .i64 < 0 && val .i64 != INT64_MIN ) {
3756+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3757+ op2_insn -> val .u64 - ctx -> ir_base [op1_insn -> op2 ].val .u64 );
3758+ if (val .i64 < 0 && ir_neg_is_safe (IR_OPT_TYPE (opt ), val .i64 )) {
37533759 val .i64 = - val .i64 ;
37543760 opt ++ ; /* ADD -> SUB */
37553761 }
@@ -3758,7 +3764,8 @@ IR_FOLD(ADD(SUB, C_I64))
37583764 IR_FOLD_RESTART ;
37593765 } else if (IR_IS_CONST_REF (op1_insn -> op1 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op1 ].op )) {
37603766 /* (c1 - x) + c2 => (c1 + c2) - x */
3761- val .i64 = ctx -> ir_base [op1_insn -> op1 ].val .u64 + op2_insn -> val .u64 ;
3767+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3768+ ctx -> ir_base [op1_insn -> op1 ].val .u64 + op2_insn -> val .u64 );
37623769 opt ++ ; /* ADD -> SUB */
37633770 op2 = op1_insn -> op2 ;
37643771 op1 = ir_const (ctx , val , op2_insn -> type );
@@ -3775,7 +3782,8 @@ IR_FOLD(SUB(ADD, C_ADDR))
37753782{
37763783 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
37773784 /* (x + c1) - c2 => x + (c1 - c2) */
3778- val .u64 = ctx -> ir_base [op1_insn -> op2 ].val .u64 - op2_insn -> val .u64 ;
3785+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3786+ ctx -> ir_base [op1_insn -> op2 ].val .u64 - op2_insn -> val .u64 );
37793787 opt -- ; /* SUB -> ADD */
37803788 op1 = op1_insn -> op1 ;
37813789 op2 = ir_const (ctx , val , op2_insn -> type );
@@ -3791,8 +3799,9 @@ IR_FOLD(SUB(ADD, C_I64))
37913799{
37923800 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
37933801 /* (x + c1) - c2 => x + (c1 - c2) */
3794- val .i64 = ctx -> ir_base [op1_insn -> op2 ].val .u64 - op2_insn -> val .u64 ;
3795- if (val .i64 < 0 && val .i64 != INT64_MIN ) {
3802+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3803+ ctx -> ir_base [op1_insn -> op2 ].val .u64 - op2_insn -> val .u64 );
3804+ if (val .i64 < 0 && ir_neg_is_safe (IR_OPT_TYPE (opt ), val .i64 )) {
37963805 val .i64 = - val .i64 ;
37973806 } else {
37983807 opt -- ; /* SUB -> ADD */
@@ -3812,7 +3821,8 @@ IR_FOLD(SUB(C_ADDR, ADD))
38123821{
38133822 if (IR_IS_CONST_REF (op2_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op2_insn -> op2 ].op )) {
38143823 /* c1 - (x + c2) => (c1 - c2) - x */
3815- val .u64 = op1_insn -> val .u64 - ctx -> ir_base [op2_insn -> op2 ].val .u64 ;
3824+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3825+ op1_insn -> val .u64 - ctx -> ir_base [op2_insn -> op2 ].val .u64 );
38163826 op2 = op2_insn -> op1 ;
38173827 op1 = ir_const (ctx , val , op2_insn -> type );
38183828 IR_FOLD_RESTART ;
@@ -3827,7 +3837,8 @@ IR_FOLD(SUB(C_I64, ADD))
38273837{
38283838 if (IR_IS_CONST_REF (op2_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op2_insn -> op2 ].op )) {
38293839 /* c1 - (x + c2) => (c1 - c2) - x */
3830- val .i64 = op1_insn -> val .u64 - ctx -> ir_base [op2_insn -> op2 ].val .u64 ;
3840+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3841+ op1_insn -> val .u64 - ctx -> ir_base [op2_insn -> op2 ].val .u64 );
38313842 op2 = op2_insn -> op1 ;
38323843 op1 = ir_const (ctx , val , op2_insn -> type );
38333844 IR_FOLD_RESTART ;
@@ -3843,7 +3854,8 @@ IR_FOLD(SUB(SUB, C_ADDR))
38433854{
38443855 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
38453856 /* (x - c1) - c2 => x - (c1 + c2) */
3846- val .u64 = ctx -> ir_base [op1_insn -> op2 ].val .u64 + op2_insn -> val .u64 ;
3857+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3858+ ctx -> ir_base [op1_insn -> op2 ].val .u64 + op2_insn -> val .u64 );
38473859 if (val .i64 < 0 && val .i64 != INT64_MIN ) {
38483860 val .i64 = - val .i64 ;
38493861 opt -- ; /* SUB -> ADD */
@@ -3853,7 +3865,8 @@ IR_FOLD(SUB(SUB, C_ADDR))
38533865 IR_FOLD_RESTART ;
38543866 } else if (IR_IS_CONST_REF (op1_insn -> op1 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op1 ].op )) {
38553867 /* (c1 - x) - c2 => (c1 - c2) - x */
3856- val .u64 = ctx -> ir_base [op1_insn -> op1 ].val .u64 - op2_insn -> val .u64 ;
3868+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3869+ ctx -> ir_base [op1_insn -> op1 ].val .u64 - op2_insn -> val .u64 );
38573870 op2 = op1_insn -> op2 ;
38583871 op1 = ir_const (ctx , val , op2_insn -> type );
38593872 IR_FOLD_RESTART ;
@@ -3868,8 +3881,9 @@ IR_FOLD(SUB(SUB, C_I64))
38683881{
38693882 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
38703883 /* (x - c1) - c2 => x - (c1 + c2) */
3871- val .i64 = ctx -> ir_base [op1_insn -> op2 ].val .u64 + op2_insn -> val .u64 ;
3872- if (val .i64 < 0 && val .i64 != INT64_MIN ) {
3884+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3885+ ctx -> ir_base [op1_insn -> op2 ].val .u64 + op2_insn -> val .u64 );
3886+ if (val .i64 < 0 && ir_neg_is_safe (IR_OPT_TYPE (opt ), val .i64 )) {
38733887 val .i64 = - val .i64 ;
38743888 opt -- ; /* SUB -> ADD */
38753889 }
@@ -3878,7 +3892,8 @@ IR_FOLD(SUB(SUB, C_I64))
38783892 IR_FOLD_RESTART ;
38793893 } else if (IR_IS_CONST_REF (op1_insn -> op1 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op1 ].op )) {
38803894 /* (c1 - x) - c2 => (c1 - c2) - x */
3881- val .i64 = ctx -> ir_base [op1_insn -> op1 ].val .u64 - op2_insn -> val .u64 ;
3895+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3896+ ctx -> ir_base [op1_insn -> op1 ].val .u64 - op2_insn -> val .u64 );
38823897 op2 = op1_insn -> op2 ;
38833898 op1 = ir_const (ctx , val , op2_insn -> type );
38843899 IR_FOLD_RESTART ;
@@ -3894,16 +3909,19 @@ IR_FOLD(SUB(C_ADDR, SUB))
38943909{
38953910 if (IR_IS_CONST_REF (op2_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op2_insn -> op2 ].op )) {
38963911 /* c1 - (x - c2) => (c1 + c2) - x */
3897- val .u64 = op1_insn -> val .u64 + ctx -> ir_base [op2_insn -> op2 ].val .u64 ;
3912+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3913+ op1_insn -> val .u64 + ctx -> ir_base [op2_insn -> op2 ].val .u64 );
38983914 op2 = op2_insn -> op1 ;
38993915 op1 = ir_const (ctx , val , op1_insn -> type );
39003916 IR_FOLD_RESTART ;
39013917 } else if (IR_IS_CONST_REF (op2_insn -> op1 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op2_insn -> op1 ].op )) {
39023918 /* c1 - (c2 - x) => x + (c1 - c2) */
3903- val .u64 = op1_insn -> val .u64 - ctx -> ir_base [op2_insn -> op1 ].val .u64 ;
3919+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3920+ op1_insn -> val .u64 - ctx -> ir_base [op2_insn -> op1 ].val .u64 );
39043921 if (val .i64 < 0 && val .i64 != INT64_MIN ) {
39053922 val .i64 = - val .i64 ;
3906- opt ++ ; /* ADD -> SUB */
3923+ } else {
3924+ opt -- ; /* SUB -> ADD */
39073925 }
39083926 op1 = op2_insn -> op2 ;
39093927 op2 = ir_const (ctx , val , op1_insn -> type );
@@ -3919,16 +3937,19 @@ IR_FOLD(SUB(C_I64, SUB))
39193937{
39203938 if (IR_IS_CONST_REF (op2_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op2_insn -> op2 ].op )) {
39213939 /* c1 - (x - c2) => (c1 + c2) - x */
3922- val .i64 = op1_insn -> val .u64 + ctx -> ir_base [op2_insn -> op2 ].val .u64 ;
3940+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3941+ op1_insn -> val .u64 + ctx -> ir_base [op2_insn -> op2 ].val .u64 );
39233942 op2 = op2_insn -> op1 ;
39243943 op1 = ir_const (ctx , val , op1_insn -> type );
39253944 IR_FOLD_RESTART ;
39263945 } else if (IR_IS_CONST_REF (op2_insn -> op1 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op2_insn -> op1 ].op )) {
39273946 /* c1 - (c2 - x) => x + (c1 - c2) */
3928- val .i64 = op1_insn -> val .u64 - ctx -> ir_base [op2_insn -> op1 ].val .u64 ;
3929- if (val .i64 < 0 && val .i64 != INT64_MIN ) {
3947+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3948+ op1_insn -> val .u64 - ctx -> ir_base [op2_insn -> op1 ].val .u64 );
3949+ if (val .i64 < 0 && ir_neg_is_safe (IR_OPT_TYPE (opt ), val .i64 )) {
39303950 val .i64 = - val .i64 ;
3931- opt ++ ; /* ADD -> SUB */
3951+ } else {
3952+ opt -- ; /* SUB -> ADD */
39323953 }
39333954 op1 = op2_insn -> op2 ;
39343955 op2 = ir_const (ctx , val , op1_insn -> type );
@@ -3945,9 +3966,8 @@ IR_FOLD(MUL(MUL, C_ADDR))
39453966{
39463967 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
39473968 /* (x * c1) * c2 => x * (c1 * c2) */
3948- uint32_t shift = (8 - ir_type_size [op2_insn -> type ]) * 8 ;
3949- val .u64 = ctx -> ir_base [op1_insn -> op2 ].val .u64 * op2_insn -> val .u64 ;
3950- val .u64 = (val .u64 << shift ) >> shift ;
3969+ val .u64 = ir_fix_unsigned (IR_OPT_TYPE (opt ),
3970+ ctx -> ir_base [op1_insn -> op2 ].val .u64 * op2_insn -> val .u64 );
39513971 op1 = op1_insn -> op1 ;
39523972 op2 = ir_const (ctx , val , op2_insn -> type );
39533973 IR_FOLD_RESTART ;
@@ -3962,9 +3982,8 @@ IR_FOLD(MUL(MUL, C_I64))
39623982{
39633983 if (IR_IS_CONST_REF (op1_insn -> op2 ) && !IR_IS_SYM_CONST (ctx -> ir_base [op1_insn -> op2 ].op )) {
39643984 /* (x * c1) * c2 => x * (c1 * c2) */
3965- uint32_t shift = (8 - ir_type_size [op2_insn -> type ]) * 8 ;
3966- val .u64 = ctx -> ir_base [op1_insn -> op2 ].val .u64 * op2_insn -> val .u64 ;
3967- val .i64 = (int64_t )(val .u64 << shift ) >> shift ;
3985+ val .u64 = ir_fix_signed (IR_OPT_TYPE (opt ),
3986+ ctx -> ir_base [op1_insn -> op2 ].val .u64 * op2_insn -> val .u64 );
39683987 op1 = op1_insn -> op1 ;
39693988 op2 = ir_const (ctx , val , op2_insn -> type );
39703989 IR_FOLD_RESTART ;
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