From de2c51fa7a22777779c6a13e259157c57e954629 Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Thu, 10 Sep 2026 08:17:43 -0500 Subject: [PATCH 1/5] UPSTREAM-PEND: drivers: adc: Run clang-format on MSPM0 ADC driver PR: 122731 Run clang-format on the driver to avoid unexpected changes in future commits. Signed-off-by: Franklin Cooper Jr --- drivers/adc/adc_mspm0_adc12.c | 74 +++++++++++++++++------------------ 1 file changed, 36 insertions(+), 38 deletions(-) diff --git a/drivers/adc/adc_mspm0_adc12.c b/drivers/adc/adc_mspm0_adc12.c index b5b34db71899..5a79d702fc61 100644 --- a/drivers/adc/adc_mspm0_adc12.c +++ b/drivers/adc/adc_mspm0_adc12.c @@ -28,20 +28,20 @@ LOG_MODULE_REGISTER(adc_mspm0); #define ADC_CONTEXT_USES_KERNEL_TIMER #include "adc_context.h" -#define ADC_MSPM0_CHANNEL_MAX (32) -#define ADC_MSPM0_NUM_SAMPLE_TIMERS 2 -#define ADC_MSPM0_MAX_OVERSAMPLING 7 -#define ADC_MSPM0_RESOLUTION_14 14 -#define ADC_MSPM0_RESOLUTION_12 12 -#define ADC_MSPM0_RESOLUTION_10 10 -#define ADC_MSPM0_RESOLUTION_8 8 -#define ADC_MSPM0_VREF_MULTIPLIER 1000 -#define ADC_MSPM0_SCOMP0 0 -#define ADC_MSPM0_SCOMP1 1 -#define ADC_MSPM0_WAKEUP_TIME_NS 5000 -#define ADC_MSPM0_NS_PER_SEC 1000000000 -#define INT_VREF BIT(0) -#define EXT_VREF BIT(1) +#define ADC_MSPM0_CHANNEL_MAX (32) +#define ADC_MSPM0_NUM_SAMPLE_TIMERS 2 +#define ADC_MSPM0_MAX_OVERSAMPLING 7 +#define ADC_MSPM0_RESOLUTION_14 14 +#define ADC_MSPM0_RESOLUTION_12 12 +#define ADC_MSPM0_RESOLUTION_10 10 +#define ADC_MSPM0_RESOLUTION_8 8 +#define ADC_MSPM0_VREF_MULTIPLIER 1000 +#define ADC_MSPM0_SCOMP0 0 +#define ADC_MSPM0_SCOMP1 1 +#define ADC_MSPM0_WAKEUP_TIME_NS 5000 +#define ADC_MSPM0_NS_PER_SEC 1000000000 +#define INT_VREF BIT(0) +#define EXT_VREF BIT(1) /* * CPU_INT, GEN_EVENT and DMA_TRIG share this interrupt-controller register @@ -389,8 +389,8 @@ static void adc_context_start_sampling(struct adc_context *ctx) regs->dma_trig.imask |= memresifg; ret = dma_reload(config->dma_dev, config->dma_channel, - data->dma_blk_cfg.source_address, (uintptr_t)data->buffer, - data->dma_blk_cfg.block_size); + data->dma_blk_cfg.source_address, (uintptr_t)data->buffer, + data->dma_blk_cfg.block_size); if (ret == 0) { ret = dma_start(config->dma_dev, config->dma_channel); } @@ -503,14 +503,13 @@ static int adc_mspm0_channel_setup(const struct device *dev, int sampling_time; int ret = 0; - if ((ch >= config->num_channels) || - (channel_cfg->differential) || + if ((ch >= config->num_channels) || (channel_cfg->differential) || (channel_cfg->gain != ADC_GAIN_1)) { return -EINVAL; } - sampling_time = adc_mspm0_validate_sampling_time(dev->config, - channel_cfg->acquisition_time); + sampling_time = + adc_mspm0_validate_sampling_time(dev->config, channel_cfg->acquisition_time); if (sampling_time < 0) { return sampling_time; } @@ -692,9 +691,8 @@ static int adc_mspm0_config_sequence(const struct device *dev, const struct adc_ ADC12_CTL1_CONSEQ_VAL_SEQUENCE | ADC12_CTL1_SAMPMODE_VAL_AUTO | ADC12_CTL1_TRIGSRC_VAL_SOFTWARE; - regs->ctl2 = (regs->ctl2 & - ~(ADC12_CTL2_ENDADD | ADC12_CTL2_STARTADD | ADC12_CTL2_RES | ADC12_CTL2_DF | - ADC12_CTL2_SAMPCNT | ADC12_CTL2_DMAEN)) | + regs->ctl2 = (regs->ctl2 & ~(ADC12_CTL2_ENDADD | ADC12_CTL2_STARTADD | ADC12_CTL2_RES | + ADC12_CTL2_DF | ADC12_CTL2_SAMPCNT | ADC12_CTL2_DMAEN)) | ADC12_CTL2_STARTADD_VAL_ADDR_00 | FIELD_PREP(ADC12_CTL2_ENDADD, data->channel_eoc) | resolution | ADC12_CTL2_DF_VAL_UNSIGNED; @@ -702,8 +700,8 @@ static int adc_mspm0_config_sequence(const struct device *dev, const struct adc_ #ifdef CONFIG_ADC_MSPM0_ADC12_DMA if (data->dma_ready) { data->dma_blk_cfg.block_size = (data->channel_eoc + 1) * sizeof(uint32_t); - regs->ctl2 |= FIELD_PREP(ADC12_CTL2_SAMPCNT, data->channel_eoc + 1) | - ADC12_CTL2_DMAEN; + regs->ctl2 |= + FIELD_PREP(ADC12_CTL2_SAMPCNT, data->channel_eoc + 1) | ADC12_CTL2_DMAEN; } #endif @@ -854,7 +852,7 @@ static int adc_mspm0_init(const struct device *dev) .head_block = &data->dma_blk_cfg, }; data->dma_blk_cfg.source_address = (uintptr_t)regs + ADC12_ALIAS_OFFSET + - offsetof(struct adc_mspm0_regs, memres); + offsetof(struct adc_mspm0_regs, memres); data->dma_blk_cfg.dest_address = data->dma_blk_cfg.source_address; data->dma_blk_cfg.source_addr_adj = DMA_ADDR_ADJ_INCREMENT; data->dma_blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_INCREMENT; @@ -873,9 +871,9 @@ static int adc_mspm0_init(const struct device *dev) return 0; } -#define MSPM0_ADC_VREF_MV(index) \ +#define MSPM0_ADC_VREF_MV(index) \ COND_CODE_1(DT_INST_NODE_HAS_PROP(index, vref), \ - (DT_PROP(DT_PHANDLE(DT_DRV_INST(index), vref), regulator_uv) / 1000), (0)) \ + (DT_PROP(DT_PHANDLE(DT_DRV_INST(index), vref), regulator_uv) / 1000), (0)) #define MSPM0_ADC_VREF(index) | MSPM0_ADC_VREF_MV(index) @@ -883,8 +881,7 @@ static DEVICE_API(adc, mspm0_driver_api) = { .channel_setup = adc_mspm0_channel_setup, .read = adc_mspm0_read, .ref_internal = (0 DT_INST_FOREACH_STATUS_OKAY(MSPM0_ADC_VREF)), - IF_ENABLED(CONFIG_ADC_ASYNC, (.read_async = adc_mspm0_read_async,)) -}; + IF_ENABLED(CONFIG_ADC_ASYNC, (.read_async = adc_mspm0_read_async,)) }; #define ADC_CLOCK_DIV(x) DT_INST_PROP(x, ti_clk_divider) #define ADC_DT_CLOCK_DIV(x) _CONCAT(ADC12_CTL0_SCLKDIV_VAL_DIV_BY_, ADC_CLOCK_DIV(x)) @@ -900,6 +897,7 @@ static DEVICE_API(adc, mspm0_driver_api) = { : (DT_INST_CLOCKS_CELL(x, clk) == MSPM0_CLOCK_HFCLK) ? ADC12_CLKCFG_SAMPCLK_VAL_HFCLK \ : -1) +/* clang-format off */ #define MSPM0_ADC_INIT(index) \ \ PINCTRL_DT_INST_DEFINE(index); \ @@ -915,11 +913,11 @@ static DEVICE_API(adc, mspm0_driver_api) = { IRQ_CONNECT(DT_INST_IRQN(index), DT_INST_IRQ(index, priority), adc_mspm0_isr, \ DEVICE_DT_INST_GET(index), 0); \ irq_enable(DT_INST_IRQN(index)); \ - } \ + } \ static const struct mspm0_sys_clock mspm0_adc_sys_clock##index = \ - MSPM0_CLOCK_SUBSYS_FN(index); \ + MSPM0_CLOCK_SUBSYS_FN(index); \ \ - struct adc_mspm0_channel_cfg \ + struct adc_mspm0_channel_cfg \ adc_mspm0_channel_cfg_##index[DT_INST_PROP(index, ti_num_channels)]; \ \ static const struct adc_mspm0_cfg adc_mspm0_cfg_##index = { \ @@ -935,14 +933,13 @@ static DEVICE_API(adc, mspm0_driver_api) = { .auto_pwdn = DT_INST_PROP_OR(index, auto_powerdown, false), \ COND_CODE_1(DT_INST_NODE_HAS_PROP(index, vref), \ (.vref_config = DEVICE_DT_GET(DT_PHANDLE(DT_DRV_INST(index), vref)),), \ - (.vref_config = NULL,)) \ - IF_ENABLED(CONFIG_ADC_MSPM0_ADC12_DMA, \ + (.vref_config = NULL,)) \ + IF_ENABLED(CONFIG_ADC_MSPM0_ADC12_DMA, \ (COND_CODE_1(DT_INST_NODE_HAS_PROP(index, dmas), \ (.dma_dev = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_IDX(index, 0)), \ .dma_channel = DT_INST_DMAS_CELL_BY_IDX(index, 0, channel), \ .dma_slot = DT_INST_DMAS_CELL_BY_IDX(index, 0, trigger),), \ - (.dma_dev = NULL,)))) \ - }; \ + (.dma_dev = NULL,)))) }; \ static struct adc_mspm0_data adc_mspm0_data_##index = { \ ADC_CONTEXT_INIT_TIMER(adc_mspm0_data_##index, ctx), \ ADC_CONTEXT_INIT_LOCK(adc_mspm0_data_##index, ctx), \ @@ -951,6 +948,7 @@ static DEVICE_API(adc, mspm0_driver_api) = { }; \ DEVICE_DT_INST_DEFINE(index, &adc_mspm0_init, NULL, &adc_mspm0_data_##index, \ &adc_mspm0_cfg_##index, POST_KERNEL, CONFIG_ADC_INIT_PRIORITY, \ - &mspm0_driver_api); \ + &mspm0_driver_api); +/* clang-format on */ DT_INST_FOREACH_STATUS_OKAY(MSPM0_ADC_INIT) From accc032e0479c24c1fedac870a09df4a66346806 Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Thu, 10 Sep 2026 14:38:12 -0500 Subject: [PATCH 2/5] UPSTREAM-PEND: drivers: adc_mspm0_adc12 - Add PM device runtime support PR: 122731 Enable PM device runtime support for MSPM0 ADC peripheral driver. Signed-off-by: Franklin Cooper Jr --- drivers/adc/Kconfig.mspm0 | 1 + drivers/adc/adc_mspm0_adc12.c | 141 ++++++++++++++++++++++++++++++---- 2 files changed, 128 insertions(+), 14 deletions(-) diff --git a/drivers/adc/Kconfig.mspm0 b/drivers/adc/Kconfig.mspm0 index 71281c6730b0..92d2798ad063 100644 --- a/drivers/adc/Kconfig.mspm0 +++ b/drivers/adc/Kconfig.mspm0 @@ -7,6 +7,7 @@ config ADC_MSPM0_ADC12 default y depends on DT_HAS_TI_MSPM0_ADC12_ENABLED select PINCTRL + select PM_DEVICE_RUNTIME_ASYNC if PM_DEVICE_RUNTIME && ADC_ASYNC help Enable support for ADC12 on the TI MSPM0 series. diff --git a/drivers/adc/adc_mspm0_adc12.c b/drivers/adc/adc_mspm0_adc12.c index 5a79d702fc61..234b4a9dc3e9 100644 --- a/drivers/adc/adc_mspm0_adc12.c +++ b/drivers/adc/adc_mspm0_adc12.c @@ -21,11 +21,16 @@ LOG_MODULE_REGISTER(adc_mspm0); #include #include #include +#include +#include #ifdef CONFIG_ADC_MSPM0_ADC12_DMA #include #endif #define ADC_CONTEXT_USES_KERNEL_TIMER +#ifdef CONFIG_ADC_ASYNC +#define ADC_CONTEXT_ENABLE_ON_COMPLETE +#endif #include "adc_context.h" #define ADC_MSPM0_CHANNEL_MAX (32) @@ -442,6 +447,19 @@ static int adc_mspm0_acq_time_to_ticks(uint16_t acq_time, uint32_t period_ns, ui return 0; } +#ifdef CONFIG_ADC_ASYNC +static void adc_context_on_complete(struct adc_context *ctx, int status) +{ + struct adc_mspm0_data *data = CONTAINER_OF(ctx, struct adc_mspm0_data, ctx); + + ARG_UNUSED(status); + + if (ctx->asynchronous) { + (void)pm_device_runtime_put_async(data->dev, K_NO_WAIT); + } +} +#endif + static int adc_mspm0_validate_sampling_time(const struct adc_mspm0_cfg *config, uint16_t acq_time) { uint32_t clock_rate; @@ -516,6 +534,11 @@ static int adc_mspm0_channel_setup(const struct device *dev, adc_context_lock(&data->ctx, false, NULL); + ret = pm_device_runtime_get(dev); + if (ret < 0) { + goto unlock; + } + if (data->sample_time[ADC_MSPM0_SCOMP0] == UINT16_MAX) { regs->scomp0 = sampling_time; data->sample_time[ADC_MSPM0_SCOMP0] = sampling_time; @@ -530,7 +553,7 @@ static int adc_mspm0_channel_setup(const struct device *dev, data->channel_cfg[ch].stime = ADC_MSPM0_SCOMP1; } else { ret = -EINVAL; - goto unlock; + goto put; } switch (channel_cfg->reference) { @@ -543,13 +566,13 @@ static int adc_mspm0_channel_setup(const struct device *dev, if ((data->vref_flags & EXT_VREF) || !(config->vref_config)) { ret = -EINVAL; - goto unlock; + goto put; } if (!(data->vref_flags & INT_VREF)) { if (regulator_enable(config->vref_config) < 0) { ret = -ENODEV; - goto unlock; + goto put; } data->vref_flags |= INT_VREF; } @@ -559,13 +582,13 @@ static int adc_mspm0_channel_setup(const struct device *dev, if ((data->vref_flags & INT_VREF) || !(config->vref_config)) { ret = -EINVAL; - goto unlock; + goto put; } if (regulator_is_enabled(config->vref_config)) { LOG_ERR("Cannot use external vref: regulator is already in use"); ret = -EBUSY; - goto unlock; + goto put; } if (!(data->vref_flags & EXT_VREF)) { @@ -575,11 +598,14 @@ static int adc_mspm0_channel_setup(const struct device *dev, #endif default: ret = -EINVAL; - goto unlock; + goto put; } data->channel_cfg[ch].configured = true; +put: + (void)pm_device_runtime_put(dev); + unlock: adc_context_release(&data->ctx, 0); return ret; @@ -765,7 +791,16 @@ static int adc_mspm0_read(const struct device *dev, const struct adc_sequence *s int ret; adc_context_lock(&data->ctx, false, NULL); + + ret = pm_device_runtime_get(dev); + if (ret < 0) { + goto release; + } + ret = adc_mspm0_read_internal(dev, sequence); + (void)pm_device_runtime_put(dev); + +release: adc_context_release(&data->ctx, ret); return ret; @@ -779,13 +814,85 @@ static int adc_mspm0_read_async(const struct device *dev, const struct adc_seque int ret; adc_context_lock(&data->ctx, true, async); + + ret = pm_device_runtime_get(dev); + if (ret < 0) { + goto release; + } + ret = adc_mspm0_read_internal(dev, sequence); + if (ret < 0) { + (void)pm_device_runtime_put(dev); + } + +release: adc_context_release(&data->ctx, ret); return ret; } #endif +static uint32_t adc_mspm0_power_down_mode(const struct adc_mspm0_cfg *config) +{ + return config->auto_pwdn ? ADC12_CTL0_PWRDN_VAL_AUTO : ADC12_CTL0_PWRDN_VAL_MANUAL; +} + +#ifdef CONFIG_PM_DEVICE +static int adc_mspm0_pm_action(const struct device *dev, enum pm_device_action action) +{ + const struct adc_mspm0_cfg *config = dev->config; +#ifdef CONFIG_REGULATOR_MSPM0_VREF + struct adc_mspm0_data *data = dev->data; +#endif + int ret; + + switch (action) { + case PM_DEVICE_ACTION_RESUME: + ret = pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_DEFAULT); + if (ret < 0) { + return ret; + } + +#ifdef CONFIG_REGULATOR_MSPM0_VREF + if ((data->vref_flags & INT_VREF) != 0U) { + ret = regulator_enable(config->vref_config); + if (ret < 0) { + (void)pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_SLEEP); + return ret; + } + } +#endif + + config->regs->ctl0 = (config->regs->ctl0 & ~ADC12_CTL0_PWRDN) | + adc_mspm0_power_down_mode(config); + return 0; + + case PM_DEVICE_ACTION_SUSPEND: + ret = pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_SLEEP); + if ((ret < 0) && (ret != -ENOENT)) { + return ret; + } + +#ifdef CONFIG_REGULATOR_MSPM0_VREF + if ((data->vref_flags & INT_VREF) != 0U) { + ret = regulator_disable(config->vref_config); + if (ret < 0) { + (void)pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_DEFAULT); + return ret; + } + } +#endif + + config->regs->ctl0 = + (config->regs->ctl0 & ~ADC12_CTL0_PWRDN) | ADC12_CTL0_PWRDN_VAL_AUTO; + return 0; + + default: + return -ENOTSUP; + } +} +#endif + static int adc_mspm0_init(const struct device *dev) { struct adc_mspm0_data *data = dev->data; @@ -823,11 +930,7 @@ static int adc_mspm0_init(const struct device *dev) } regs->clkfreq = frange; - if (config->auto_pwdn) { - regs->ctl0 = (regs->ctl0 & ~ADC12_CTL0_PWRDN) | ADC12_CTL0_PWRDN_VAL_AUTO; - } else { - regs->ctl0 = (regs->ctl0 & ~ADC12_CTL0_PWRDN) | ADC12_CTL0_PWRDN_VAL_MANUAL; - } + regs->ctl0 = (regs->ctl0 & ~ADC12_CTL0_PWRDN) | adc_mspm0_power_down_mode(config); data->sample_time[ADC_MSPM0_SCOMP0] = UINT16_MAX; data->sample_time[ADC_MSPM0_SCOMP1] = UINT16_MAX; @@ -868,7 +971,16 @@ static int adc_mspm0_init(const struct device *dev) adc_context_unlock_unconditionally(&data->ctx); +#ifdef CONFIG_PM_DEVICE + ret = adc_mspm0_pm_action(dev, PM_DEVICE_ACTION_SUSPEND); + if (ret < 0) { + return ret; + } + + return pm_device_driver_init(dev, adc_mspm0_pm_action); +#else return 0; +#endif } #define MSPM0_ADC_VREF_MV(index) \ @@ -901,6 +1013,7 @@ static DEVICE_API(adc, mspm0_driver_api) = { #define MSPM0_ADC_INIT(index) \ \ PINCTRL_DT_INST_DEFINE(index); \ + PM_DEVICE_DT_INST_DEFINE(index, adc_mspm0_pm_action); \ \ BUILD_ASSERT(ADC_DT_SAMPCLK(index) != -1, \ "unsupported ADC sample clock source: must be ULPCLK, SYSOSC or HFCLK"); \ @@ -946,9 +1059,9 @@ static DEVICE_API(adc, mspm0_driver_api) = { ADC_CONTEXT_INIT_SYNC(adc_mspm0_data_##index, ctx), \ .channel_cfg = adc_mspm0_channel_cfg_##index, \ }; \ - DEVICE_DT_INST_DEFINE(index, &adc_mspm0_init, NULL, &adc_mspm0_data_##index, \ - &adc_mspm0_cfg_##index, POST_KERNEL, CONFIG_ADC_INIT_PRIORITY, \ - &mspm0_driver_api); + DEVICE_DT_INST_DEFINE(index, &adc_mspm0_init, PM_DEVICE_DT_INST_GET(index), \ + &adc_mspm0_data_##index, &adc_mspm0_cfg_##index, POST_KERNEL, \ + CONFIG_ADC_INIT_PRIORITY, &mspm0_driver_api); /* clang-format on */ DT_INST_FOREACH_STATUS_OKAY(MSPM0_ADC_INIT) From e873125689a51b604ebab8048240b8840bc8be21 Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Sat, 12 Sep 2026 09:06:51 -0500 Subject: [PATCH 3/5] UPSTREAM-PEND: dts: arm: ti: mspm0: Specify disabling power states for ADC PR: 122731 Add disabling power states for ADC peripheral. These low power modes will disrupt ADC operations. This information came from the datasheets table called "Operating Modes". Signed-off-by: Franklin Cooper Jr --- dts/arm/ti/mspm0/g/mspm0g.dtsi | 2 ++ dts/arm/ti/mspm0/l/mspm0l.dtsi | 1 + 2 files changed, 3 insertions(+) diff --git a/dts/arm/ti/mspm0/g/mspm0g.dtsi b/dts/arm/ti/mspm0/g/mspm0g.dtsi index 1fcf7d388074..d5cec09b6488 100644 --- a/dts/arm/ti/mspm0/g/mspm0g.dtsi +++ b/dts/arm/ti/mspm0/g/mspm0g.dtsi @@ -98,6 +98,7 @@ clocks = <&ckm MSPM0_CLOCK_ULPCLK>; max-result-reg = <12>; interrupts = <4 0>; + zephyr,disabling-power-states = <&stop2 &stdby0 &stdby1>; status = "disabled"; ti,num-channels = <16>; #io-channel-cells = <1>; @@ -109,6 +110,7 @@ clocks = <&ckm MSPM0_CLOCK_ULPCLK>; max-result-reg = <12>; interrupts = <5 0>; + zephyr,disabling-power-states = <&stop2 &stdby0 &stdby1>; status = "disabled"; ti,num-channels = <16>; #io-channel-cells = <1>; diff --git a/dts/arm/ti/mspm0/l/mspm0l.dtsi b/dts/arm/ti/mspm0/l/mspm0l.dtsi index 009beccbaeb5..35c0f154cd36 100644 --- a/dts/arm/ti/mspm0/l/mspm0l.dtsi +++ b/dts/arm/ti/mspm0/l/mspm0l.dtsi @@ -127,6 +127,7 @@ clocks = <&ckm MSPM0_CLOCK_ULPCLK>; max-result-reg = <12>; interrupts = <4 0>; + zephyr,disabling-power-states = <&stop2 &stdby0 &stdby1>; status = "disabled"; ti,num-channels = <32>; #io-channel-cells = <1>; From 8be875045d62845d83c441d25220559bfdaed466 Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Sat, 12 Sep 2026 15:27:34 -0500 Subject: [PATCH 4/5] UPSTREAM-PEND: drivers: adc_mspm0_adc12 - Add policy locks PR: 122731 Add policy locks to prevent system from entering a low power mode that would disrupt ADC operations. Signed-off-by: Franklin Cooper Jr --- drivers/adc/adc_mspm0_adc12.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/adc/adc_mspm0_adc12.c b/drivers/adc/adc_mspm0_adc12.c index 234b4a9dc3e9..7e6a03861695 100644 --- a/drivers/adc/adc_mspm0_adc12.c +++ b/drivers/adc/adc_mspm0_adc12.c @@ -23,6 +23,7 @@ LOG_MODULE_REGISTER(adc_mspm0); #include #include #include +#include #ifdef CONFIG_ADC_MSPM0_ADC12_DMA #include #endif @@ -455,6 +456,7 @@ static void adc_context_on_complete(struct adc_context *ctx, int status) ARG_UNUSED(status); if (ctx->asynchronous) { + pm_policy_device_power_lock_put(data->dev); (void)pm_device_runtime_put_async(data->dev, K_NO_WAIT); } } @@ -797,7 +799,12 @@ static int adc_mspm0_read(const struct device *dev, const struct adc_sequence *s goto release; } + pm_policy_device_power_lock_get(dev); + ret = adc_mspm0_read_internal(dev, sequence); + + pm_policy_device_power_lock_put(dev); + (void)pm_device_runtime_put(dev); release: @@ -820,8 +827,11 @@ static int adc_mspm0_read_async(const struct device *dev, const struct adc_seque goto release; } + pm_policy_device_power_lock_get(dev); + ret = adc_mspm0_read_internal(dev, sequence); if (ret < 0) { + pm_policy_device_power_lock_put(dev); (void)pm_device_runtime_put(dev); } From b683e7591698a3d886cd6fd7c85171d5d043fc30 Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Mon, 19 Oct 2026 14:24:31 -0500 Subject: [PATCH 5/5] UPSTREAM-PEND: tests: drivers: adc: adc_api: Add support for additional ... PR: 122731 Add support for both lp_mspm0g3519 and lp_mspm0l2228. Also include variant to enable running the test with PM runtime and policy locks enabled. Signed-off-by: Franklin Cooper Jr --- .../adc_api/boards/lp_mspm0g3519_pm_runtime.overlay | 9 +++++++++ .../adc_api/boards/lp_mspm0l2228_pm_runtime.overlay | 9 +++++++++ tests/drivers/adc/adc_api/testcase.yaml | 12 ++++++++++++ 3 files changed, 30 insertions(+) create mode 100644 tests/drivers/adc/adc_api/boards/lp_mspm0g3519_pm_runtime.overlay create mode 100644 tests/drivers/adc/adc_api/boards/lp_mspm0l2228_pm_runtime.overlay diff --git a/tests/drivers/adc/adc_api/boards/lp_mspm0g3519_pm_runtime.overlay b/tests/drivers/adc/adc_api/boards/lp_mspm0g3519_pm_runtime.overlay new file mode 100644 index 000000000000..23872e39b98e --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/lp_mspm0g3519_pm_runtime.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2026 Texas Instruments + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&adc0 { + zephyr,pm-device-runtime-auto; +}; diff --git a/tests/drivers/adc/adc_api/boards/lp_mspm0l2228_pm_runtime.overlay b/tests/drivers/adc/adc_api/boards/lp_mspm0l2228_pm_runtime.overlay new file mode 100644 index 000000000000..23872e39b98e --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/lp_mspm0l2228_pm_runtime.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2026 Texas Instruments + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&adc0 { + zephyr,pm-device-runtime-auto; +}; diff --git a/tests/drivers/adc/adc_api/testcase.yaml b/tests/drivers/adc/adc_api/testcase.yaml index 61d425ab2c7d..76ebb53c5bce 100644 --- a/tests/drivers/adc/adc_api/testcase.yaml +++ b/tests/drivers/adc/adc_api/testcase.yaml @@ -23,6 +23,18 @@ tests: - rpi_pico2/rp2350a/m33/mcuboot - rpi_pico2/rp2350a/m33/w/mcuboot - raytac_an54lq_db_15/nrf54l15/cpuapp/ns + drivers.adc.pm: + platform_allow: + - lp_mspm0g3519/mspm0g3519 + - lp_mspm0l2228/mspm0l2228 + extra_args: + - platform:lp_mspm0g3519/mspm0g3519:DTC_OVERLAY_FILE="boards/lp_mspm0g3519.overlay;boards/lp_mspm0g3519_pm_runtime.overlay" + - platform:lp_mspm0l2228/mspm0l2228:DTC_OVERLAY_FILE="boards/lp_mspm0l2228.overlay;boards/lp_mspm0l2228_pm_runtime.overlay" + extra_configs: + - CONFIG_PM=y + - CONFIG_PM_DEVICE=y + - CONFIG_PM_DEVICE_RUNTIME=y + - CONFIG_PM_POLICY_DEVICE_CONSTRAINTS=y drivers.adc.b_u585i_iot02a_adc4: extra_args: - platform:b_u585i_iot02a/stm32u585xx:DTC_OVERLAY_FILE="boards/b_u585i_iot02a_adc4.overlay"