From 10ab18fffe4793e716338f9663a3d5c7468a47cf Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Sun, 30 Aug 2026 06:18:37 -0500 Subject: [PATCH 1/5] UPSTREAM-PEND: drivers: spi: Run clang-format on spi_mspm0.c PR: 122803 Update code to address clang-format issues so future patches don't incorporate unexpected formating changes. Signed-off-by: Franklin Cooper Jr --- drivers/spi/spi_mspm0.c | 83 +++++++++++++++++++---------------------- 1 file changed, 39 insertions(+), 44 deletions(-) diff --git a/drivers/spi/spi_mspm0.c b/drivers/spi/spi_mspm0.c index 09cc02b61ae7..21038346bb1a 100644 --- a/drivers/spi/spi_mspm0.c +++ b/drivers/spi/spi_mspm0.c @@ -23,37 +23,35 @@ LOG_MODULE_REGISTER(spi_mspm0, CONFIG_SPI_LOG_LEVEL); #include "spi_context.h" /* Data Frame Size (DFS) */ -#define SPI_DFS_8BIT 1 -#define SPI_DFS_16BIT 2 +#define SPI_DFS_8BIT 1 +#define SPI_DFS_16BIT 2 /* Range for SPI Serial Clock Rate (SCR) */ -#define MSPM0_SPI_SCR_MIN 0 -#define MSPM0_SPI_SCR_MAX 1023 +#define MSPM0_SPI_SCR_MIN 0 +#define MSPM0_SPI_SCR_MAX 1023 -#define SPI_MODE(operation) \ - (operation & BIT(0) ? DL_SPI_MODE_PERIPHERAL : DL_SPI_MODE_CONTROLLER) +#define SPI_MODE(operation) (operation & BIT(0) ? DL_SPI_MODE_PERIPHERAL : DL_SPI_MODE_CONTROLLER) -#define BIT_ORDER_MODE(operation) \ +#define BIT_ORDER_MODE(operation) \ (operation & BIT(4) ? DL_SPI_BIT_ORDER_LSB_FIRST : DL_SPI_BIT_ORDER_MSB_FIRST) /* MSPM0 DSS field expects word size - 1 */ -#define DATA_SIZE_MODE(operation) \ - (SPI_WORD_SIZE_GET(operation) - 1) +#define DATA_SIZE_MODE(operation) (SPI_WORD_SIZE_GET(operation) - 1) -#define POLARITY_MODE(operation) \ +#define POLARITY_MODE(operation) \ (SPI_MODE_GET(operation) & SPI_MODE_CPOL ? SPI_CTL0_SPO_HIGH : SPI_CTL0_SPO_LOW) -#define PHASE_MODE(operation) \ +#define PHASE_MODE(operation) \ (SPI_MODE_GET(operation) & SPI_MODE_CPHA ? SPI_CTL0_SPH_SECOND : SPI_CTL0_SPH_FIRST) -#define DUPLEX_MODE(operation) \ +#define DUPLEX_MODE(operation) \ (operation & BIT(11) ? SPI_CTL0_FRF_MOTOROLA_3WIRE : SPI_CTL0_FRF_MOTOROLA_4WIRE) /* TI uses fixed frame format; Motorola combines duplex, polarity, phase */ -#define FRAME_FORMAT_MODE(operation) \ - (operation & SPI_FRAME_FORMAT_TI \ - ? SPI_CTL0_FRF_TI_SYNC \ - : DUPLEX_MODE(operation) | POLARITY_MODE(operation) | PHASE_MODE(operation)) +#define FRAME_FORMAT_MODE(operation) \ + (operation & SPI_FRAME_FORMAT_TI \ + ? SPI_CTL0_FRF_TI_SYNC \ + : DUPLEX_MODE(operation) | POLARITY_MODE(operation) | PHASE_MODE(operation)) /* Computes the minimum number of bytes per frame using word_size. Utilizes ceil * division, to ensure sufficient byte allocation for non-multiples of 8 bits @@ -99,9 +97,8 @@ static int spi_mspm0_configure(const struct device *dev, const struct spi_config return -ENOTSUP; } - ret = clock_control_get_rate(clk_dev, - (clock_control_subsys_t)(uintptr_t)config->clock_subsys, - &clock_rate); + ret = clock_control_get_rate( + clk_dev, (clock_control_subsys_t)(uintptr_t)config->clock_subsys, &clock_rate); if (ret < 0) { return ret; } @@ -121,8 +118,8 @@ static int spi_mspm0_configure(const struct device *dev, const struct spi_config /* Peripheral should be disabled before applying a new configuration */ DL_SPI_disable(regs); - dl_spi_cfg.parity = DL_SPI_PARITY_NONE; /* Currently unused in zephyr */ - dl_spi_cfg.chipSelectPin = DL_SPI_CHIP_SELECT_NONE; /* spi_context controls the CS */ + dl_spi_cfg.parity = DL_SPI_PARITY_NONE; /* Currently unused in zephyr */ + dl_spi_cfg.chipSelectPin = DL_SPI_CHIP_SELECT_NONE; /* spi_context controls the CS */ dl_spi_cfg.mode = SPI_MODE(spi_cfg->operation); dl_spi_cfg.bitOrder = BIT_ORDER_MODE(spi_cfg->operation); dl_spi_cfg.dataSize = DATA_SIZE_MODE(spi_cfg->operation); @@ -209,8 +206,7 @@ static void spi_mspm0_start_transfer(const struct device *dev, uint8_t dfs) spi_context_complete(&data->spi_ctx, dev, 0); } -static int spi_mspm0_transceive(const struct device *dev, - const struct spi_config *spi_cfg, +static int spi_mspm0_transceive(const struct device *dev, const struct spi_config *spi_cfg, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs) { @@ -307,27 +303,26 @@ static int spi_mspm0_init(const struct device *dev) return ret; } -#define MSPM0_SPI_INIT(inst) \ - PINCTRL_DT_INST_DEFINE(inst); \ - \ - static const struct mspm0_sys_clock mspm0_spi_sys_clock##inst = \ - MSPM0_CLOCK_SUBSYS_FN(inst); \ - \ - static const struct spi_mspm0_config spi_mspm0_config_##inst = { \ - DEVICE_MMIO_ROM_INIT(DT_DRV_INST(inst)), \ - .clock_subsys = &mspm0_spi_sys_clock##inst, \ - .pinctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ - .clock_sel = MSPM0_CLOCK_PERIPH_REG_MASK(DT_INST_CLOCKS_CELL(inst, clk)), \ - }; \ - \ - static struct spi_mspm0_data spi_mspm0_data_##inst = { \ - SPI_CONTEXT_INIT_LOCK(spi_mspm0_data_##inst, spi_ctx), \ - SPI_CONTEXT_INIT_SYNC(spi_mspm0_data_##inst, spi_ctx), \ - SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), spi_ctx) \ - }; \ - \ - DEVICE_DT_INST_DEFINE(inst, spi_mspm0_init, NULL, &spi_mspm0_data_##inst, \ - &spi_mspm0_config_##inst, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ +#define MSPM0_SPI_INIT(inst) \ + PINCTRL_DT_INST_DEFINE(inst); \ + \ + static const struct mspm0_sys_clock mspm0_spi_sys_clock##inst = \ + MSPM0_CLOCK_SUBSYS_FN(inst); \ + \ + static const struct spi_mspm0_config spi_mspm0_config_##inst = { \ + DEVICE_MMIO_ROM_INIT(DT_DRV_INST(inst)), \ + .clock_subsys = &mspm0_spi_sys_clock##inst, \ + .pinctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ + .clock_sel = MSPM0_CLOCK_PERIPH_REG_MASK(DT_INST_CLOCKS_CELL(inst, clk)), \ + }; \ + \ + static struct spi_mspm0_data spi_mspm0_data_##inst = { \ + SPI_CONTEXT_INIT_LOCK(spi_mspm0_data_##inst, spi_ctx), \ + SPI_CONTEXT_INIT_SYNC(spi_mspm0_data_##inst, spi_ctx), \ + SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), spi_ctx)}; \ + \ + DEVICE_DT_INST_DEFINE(inst, spi_mspm0_init, NULL, &spi_mspm0_data_##inst, \ + &spi_mspm0_config_##inst, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ &spi_mspm0_api); DT_INST_FOREACH_STATUS_OKAY(MSPM0_SPI_INIT) From b7a4a582a1fc5581792422a60f07c17692f1dcbf Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Sun, 30 Aug 2026 13:46:22 -0500 Subject: [PATCH 2/5] UPSTREAM-PEND: drivers: spi: Add support for PM device runtime to spi_mspm0 PR: 122803 Add PM device runtime support to the driver. Signed-off-by: Franklin Cooper Jr --- drivers/spi/spi_mspm0.c | 101 ++++++++++++++++++++++++++++++++++------ 1 file changed, 88 insertions(+), 13 deletions(-) diff --git a/drivers/spi/spi_mspm0.c b/drivers/spi/spi_mspm0.c index 21038346bb1a..7f2922357759 100644 --- a/drivers/spi/spi_mspm0.c +++ b/drivers/spi/spi_mspm0.c @@ -13,6 +13,8 @@ #include #include #include +#include +#include /* TI DriverLib includes */ #include @@ -63,6 +65,7 @@ struct spi_mspm0_config { const struct mspm0_sys_clock *clock_subsys; const struct pinctrl_dev_config *pinctrl; DL_SPI_CLOCK clock_sel; + DL_SPI_CLOCK_DIVIDE_RATIO clock_divide_ratio; }; struct spi_mspm0_data { @@ -75,6 +78,51 @@ static inline SPI_Regs *spi_mspm0_regs(const struct device *dev) return (SPI_Regs *)DEVICE_MMIO_GET(dev); } +#ifdef CONFIG_PM_DEVICE +static int mspm0_spi_pm_action(const struct device *dev, enum pm_device_action action) +{ + const struct spi_mspm0_config *const config = dev->config; + SPI_Regs *regs = spi_mspm0_regs(dev); + DL_SPI_ClockConfig clk_cfg; + int err; + + clk_cfg.divideRatio = config->clock_divide_ratio; + + switch (action) { + case PM_DEVICE_ACTION_RESUME: + /* Set pins to active state */ + err = pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_DEFAULT); + if (err < 0) { + return err; + } + + /* Restoring parent clock selection */ + clk_cfg.clockSel = config->clock_sel; + + DL_SPI_setClockConfig(regs, (DL_SPI_ClockConfig *)&clk_cfg); + + break; + case PM_DEVICE_ACTION_SUSPEND: + /* Move pins to sleep state */ + err = pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_SLEEP); + if ((err < 0) && (err != -ENOENT)) { + return err; + } + + /* Don't select any parent clock effectively freezing the module */ + clk_cfg.clockSel = 0; + + DL_SPI_setClockConfig(regs, (DL_SPI_ClockConfig *)&clk_cfg); + + break; + default: + return -ENOTSUP; + } + + return 0; +} +#endif + static int spi_mspm0_configure(const struct device *dev, const struct spi_config *spi_cfg, uint8_t dfs) { @@ -222,28 +270,35 @@ static int spi_mspm0_transceive(const struct device *dev, const struct spi_confi return -EINVAL; } - spi_context_lock(&data->spi_ctx, false, NULL, NULL, spi_cfg); - word_size = SPI_WORD_SIZE_GET(spi_cfg->operation); if (!IN_RANGE(word_size, 4, 16)) { - spi_context_release(&data->spi_ctx, -ENOTSUP); return -ENOTSUP; } dfs = BYTES_PER_FRAME(word_size); + ret = pm_device_runtime_get(dev); + if (ret < 0) { + return ret; + } + + spi_context_lock(&data->spi_ctx, false, NULL, NULL, spi_cfg); + ret = spi_mspm0_configure(dev, spi_cfg, dfs); if (ret != 0) { - spi_context_release(&data->spi_ctx, ret); - return ret; + goto release; } spi_context_buffers_setup(&data->spi_ctx, tx_bufs, rx_bufs, dfs); spi_mspm0_start_transfer(dev, dfs); ret = spi_context_wait_for_completion(&data->spi_ctx); + +release: spi_context_release(&data->spi_ctx, ret); + (void)pm_device_runtime_put(dev); + return ret; } @@ -251,17 +306,26 @@ static int spi_mspm0_release(const struct device *dev, const struct spi_config * { struct spi_mspm0_data *data = dev->data; SPI_Regs *regs = spi_mspm0_regs(dev); + int ret; if (!spi_context_configured(&data->spi_ctx, spi_cfg)) { return -EINVAL; } + ret = pm_device_runtime_get(dev); + if (ret < 0) { + return ret; + } + if (DL_SPI_isBusy(regs)) { - return -EBUSY; + ret = -EBUSY; + } else { + spi_context_unlock_unconditionally(&data->spi_ctx); + ret = 0; } - spi_context_unlock_unconditionally(&data->spi_ctx); - return 0; + (void)pm_device_runtime_put(dev); + return ret; } static DEVICE_API(spi, spi_mspm0_api) = { @@ -293,14 +357,23 @@ static int spi_mspm0_init(const struct device *dev) } clk_cfg.clockSel = config->clock_sel; - clk_cfg.divideRatio = DL_SPI_CLOCK_DIVIDE_RATIO_1; + clk_cfg.divideRatio = config->clock_divide_ratio; DL_SPI_setClockConfig(regs, (DL_SPI_ClockConfig *)&clk_cfg); DL_SPI_enable(regs); spi_context_unlock_unconditionally(&data->spi_ctx); - return ret; +#ifdef CONFIG_PM_DEVICE + ret = mspm0_spi_pm_action(dev, PM_DEVICE_ACTION_SUSPEND); + if (ret < 0) { + return ret; + } + + return pm_device_driver_init(dev, mspm0_spi_pm_action); +#else + return 0; +#endif } #define MSPM0_SPI_INIT(inst) \ @@ -314,6 +387,7 @@ static int spi_mspm0_init(const struct device *dev) .clock_subsys = &mspm0_spi_sys_clock##inst, \ .pinctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ .clock_sel = MSPM0_CLOCK_PERIPH_REG_MASK(DT_INST_CLOCKS_CELL(inst, clk)), \ + .clock_divide_ratio = DL_SPI_CLOCK_DIVIDE_RATIO_1, \ }; \ \ static struct spi_mspm0_data spi_mspm0_data_##inst = { \ @@ -321,8 +395,9 @@ static int spi_mspm0_init(const struct device *dev) SPI_CONTEXT_INIT_SYNC(spi_mspm0_data_##inst, spi_ctx), \ SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), spi_ctx)}; \ \ - DEVICE_DT_INST_DEFINE(inst, spi_mspm0_init, NULL, &spi_mspm0_data_##inst, \ - &spi_mspm0_config_##inst, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ - &spi_mspm0_api); + PM_DEVICE_DT_INST_DEFINE(inst, mspm0_spi_pm_action); \ + DEVICE_DT_INST_DEFINE(inst, spi_mspm0_init, PM_DEVICE_DT_INST_GET(inst), \ + &spi_mspm0_data_##inst, &spi_mspm0_config_##inst, POST_KERNEL, \ + CONFIG_SPI_INIT_PRIORITY, &spi_mspm0_api); DT_INST_FOREACH_STATUS_OKAY(MSPM0_SPI_INIT) From 838289acb3184359973be3433ed1b0f40639e226 Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Sun, 6 Sep 2026 07:11:54 -0500 Subject: [PATCH 3/5] UPSTREAM-PEND: dts: arm: ti: mspm0: Specify disabling power states for SPI PR: 122803 Add disabling power states for spi peripheral. These low power modes will disrupt spi operations. This information came from the datasheets table called "Operating Modes". Signed-off-by: Franklin Cooper Jr --- dts/arm/ti/mspm0/g/mspm0g.dtsi | 1 + dts/arm/ti/mspm0/g/mspm0gx51x.dtsi | 1 + dts/arm/ti/mspm0/l/mspm0lx22x.dtsi | 4 ++++ dts/arm/ti/mspm0/mspm0.dtsi | 1 + 4 files changed, 7 insertions(+) diff --git a/dts/arm/ti/mspm0/g/mspm0g.dtsi b/dts/arm/ti/mspm0/g/mspm0g.dtsi index 1fcf7d388074..4ae12a8ee69c 100644 --- a/dts/arm/ti/mspm0/g/mspm0g.dtsi +++ b/dts/arm/ti/mspm0/g/mspm0g.dtsi @@ -282,6 +282,7 @@ spi1: spi@4046a000 { compatible = "ti,mspm0-spi"; reg = <0x4046a000 0x2000>; + zephyr,disabling-power-states = <&stop0 &stop1 &stop2 &stdby0 &stdby1>; status = "disabled"; }; }; diff --git a/dts/arm/ti/mspm0/g/mspm0gx51x.dtsi b/dts/arm/ti/mspm0/g/mspm0gx51x.dtsi index 45062c5b0ebd..b2f8d95804fc 100644 --- a/dts/arm/ti/mspm0/g/mspm0gx51x.dtsi +++ b/dts/arm/ti/mspm0/g/mspm0gx51x.dtsi @@ -100,6 +100,7 @@ spi2: spi@4046c000 { compatible = "ti,mspm0-spi"; reg = <0x4046c000 0x2000>; + zephyr,disabling-power-states = <&stop0 &stop1 &stop2 &stdby0 &stdby1>; status = "disabled"; }; diff --git a/dts/arm/ti/mspm0/l/mspm0lx22x.dtsi b/dts/arm/ti/mspm0/l/mspm0lx22x.dtsi index 6d8588597c54..8e65e031d805 100644 --- a/dts/arm/ti/mspm0/l/mspm0lx22x.dtsi +++ b/dts/arm/ti/mspm0/l/mspm0lx22x.dtsi @@ -8,6 +8,10 @@ #include #include +&spi0 { + /delete-property/ zephyr,disabling-power-states; +}; + / { soc { sram0: memory@20000000 { diff --git a/dts/arm/ti/mspm0/mspm0.dtsi b/dts/arm/ti/mspm0/mspm0.dtsi index c6568d08b642..151db99d7768 100644 --- a/dts/arm/ti/mspm0/mspm0.dtsi +++ b/dts/arm/ti/mspm0/mspm0.dtsi @@ -289,6 +289,7 @@ spi0: spi@40468000 { compatible = "ti,mspm0-spi"; reg = <0x40468000 0x2000>; + zephyr,disabling-power-states = <&stop0 &stop1 &stop2 &stdby0 &stdby1>; status = "disabled"; }; }; From fb834838e55403ccffeab69fd6355c311c849a94 Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Sun, 6 Sep 2026 14:32:09 -0500 Subject: [PATCH 4/5] UPSTREAM-PEND: drivers: spi: Add support for policy lock to spi_mspm0 PR: 122803 Add policy locks to prevent system from entering a low power mode that would disrupt spi operations. Signed-off-by: Franklin Cooper Jr --- drivers/spi/spi_mspm0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/spi_mspm0.c b/drivers/spi/spi_mspm0.c index 7f2922357759..9d51ec7817be 100644 --- a/drivers/spi/spi_mspm0.c +++ b/drivers/spi/spi_mspm0.c @@ -15,6 +15,7 @@ #include #include #include +#include /* TI DriverLib includes */ #include @@ -281,6 +282,7 @@ static int spi_mspm0_transceive(const struct device *dev, const struct spi_confi if (ret < 0) { return ret; } + pm_policy_device_power_lock_get(dev); spi_context_lock(&data->spi_ctx, false, NULL, NULL, spi_cfg); @@ -298,6 +300,7 @@ static int spi_mspm0_transceive(const struct device *dev, const struct spi_confi spi_context_release(&data->spi_ctx, ret); (void)pm_device_runtime_put(dev); + pm_policy_device_power_lock_put(dev); return ret; } From 5da8844eb7edca022c085521d422ebb9d2ce3953 Mon Sep 17 00:00:00 2001 From: Franklin Cooper Jr Date: Tue, 29 Sep 2026 10:27:43 -0500 Subject: [PATCH 5/5] UPSTREAM-PEND: tests: drivers: spi_loopback: Add PM Runtime Variant for ... PR: 122803 Add variant of test that enables PM device runtime for lp_mspm0g3519 and lp_mspm0l2228. Also add policy locks. Signed-off-by: Franklin Cooper Jr --- .../boards/lp_mspm0g3519_pm_runtime.overlay | 9 +++++++++ .../spi/spi_loopback/boards/lp_mspm0l2228.conf | 1 + .../boards/lp_mspm0l2228_pm_runtime.overlay | 9 +++++++++ tests/drivers/spi/spi_loopback/testcase.yaml | 11 +++++++++++ 4 files changed, 30 insertions(+) create mode 100644 tests/drivers/spi/spi_loopback/boards/lp_mspm0g3519_pm_runtime.overlay create mode 100644 tests/drivers/spi/spi_loopback/boards/lp_mspm0l2228_pm_runtime.overlay diff --git a/tests/drivers/spi/spi_loopback/boards/lp_mspm0g3519_pm_runtime.overlay b/tests/drivers/spi/spi_loopback/boards/lp_mspm0g3519_pm_runtime.overlay new file mode 100644 index 000000000000..270ee67afe37 --- /dev/null +++ b/tests/drivers/spi/spi_loopback/boards/lp_mspm0g3519_pm_runtime.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2026 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&spi0 { + zephyr,pm-device-runtime-auto; +}; diff --git a/tests/drivers/spi/spi_loopback/boards/lp_mspm0l2228.conf b/tests/drivers/spi/spi_loopback/boards/lp_mspm0l2228.conf index be2c9e470e0f..ef21d7445bfe 100644 --- a/tests/drivers/spi/spi_loopback/boards/lp_mspm0l2228.conf +++ b/tests/drivers/spi/spi_loopback/boards/lp_mspm0l2228.conf @@ -4,3 +4,4 @@ CONFIG_SPI_LOOPBACK_MODE_LOOP=y CONFIG_SPI_ASYNC=n CONFIG_GPIO=y +CONFIG_SPI_IDEAL_TRANSFER_DURATION_SCALING=10 diff --git a/tests/drivers/spi/spi_loopback/boards/lp_mspm0l2228_pm_runtime.overlay b/tests/drivers/spi/spi_loopback/boards/lp_mspm0l2228_pm_runtime.overlay new file mode 100644 index 000000000000..270ee67afe37 --- /dev/null +++ b/tests/drivers/spi/spi_loopback/boards/lp_mspm0l2228_pm_runtime.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2026 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&spi0 { + zephyr,pm-device-runtime-auto; +}; diff --git a/tests/drivers/spi/spi_loopback/testcase.yaml b/tests/drivers/spi/spi_loopback/testcase.yaml index 5dcf4c651f1c..69984c99419a 100644 --- a/tests/drivers/spi/spi_loopback/testcase.yaml +++ b/tests/drivers/spi/spi_loopback/testcase.yaml @@ -465,3 +465,14 @@ tests: extra_args: - DTC_OVERLAY_FILE="boards/${BOARD}_${NORMALIZED_BOARD_QUALIFIERS}_sci_b_spi.overlay" - CONF_FILE="prj.conf" # to exclude "boards/${BOARD}_${NORMALIZED_BOARD_QUALIFIERS}.overlay" + drivers.spi.loopback.pm: + platform_allow: + - lp_mspm0g3519 + - lp_mspm0l2228 + extra_configs: + - CONFIG_PM=y + - CONFIG_PM_DEVICE=y + - CONFIG_PM_DEVICE_RUNTIME=y + - CONFIG_PM_POLICY_DEVICE_CONSTRAINTS=y + extra_args: + - EXTRA_DTC_OVERLAY_FILE="boards/${BOARD}_pm_runtime.overlay"